1050E and ICD US Doubler

[Rybags]

I've only got CRO... rumour has it, ijor has a nice datalogging one.

 

I suppose 5 Volts is way too much for a PC soundcard input.

 

I could probably just setup a program that constantly transmits $AA over the bus at whatever speeds we want - and get some photos.

[candle]

Gary, program would do, i got Rigol DS1052E, just not enought time to do everything by myself

[Rybags]

OK... I'll see what I can whip up a bit later... just send a repeating byte at your specified AUDF rate.

 

Do you need an extra output that triggers sweep on each byte, e.g. 1->0 transition on a PortA bit or similar?

[candle]

it might be helpfull

ie command based trigger or motor_on

[Rybags]

Try this one - quick BASIC + Asm program. Haven't tested it with CRO, but it should work.

 

It toggles the motor control line with each byte sent. Value of byte sent can be changed, variable SEROUT.

You can alter number of packets sent (Count) as well as AUDF value (0..65535).

Each packet is 256 bytes, entire transmission is sent continously without any gaps. Naturally, no SIO protocols, command line, etc is used. Just pure output direct to Pokey.

 

Continuous mode just endlessly sends the packets as specified, press Reset to get out of that one.

 

siotest1.bas

 

Assembler program:

 

 

 

*=$600
;
;
; SEROUT Test
; 
; USR(routine,serout_value,count,trans_freq)
;
pokmsk	= $10
brkflag = $11
audf1	= $d200
audc1	= $d201
audc2	= $d203
audf3	= $d204
audc3	= $d205
audf4	= $d206
audc4	= $d207
audctl	= $d208
skres	= $d20a
serout	= $d20d
irqen	= $d20e
irqst	= $d20e
skctl	= $d20f
pactl	= $d302
nmien	= $d40e
pla
pla
pla
sta outbyte
pla
sta count+1
pla
sta count
pla
sta freq+1
pla
sta freq
sei
lda #0
sta nmien
ldx #8
clr1
sta audf1,x
dex
bpl clr1
sta skres
lda #$28
sta audctl
lda pokmsk
ora #$10
sta irqen
lda #$aa
sta audc4
sta audc3
sta audc2
sta audc1
lda freq
sta audf3
lda freq+1
sta audf4
lda #$23
sta skctl
ldx #0
serout_loop
lda outbyte
sta serout
lda pactl
eor #8
sta pactl
dex
bne wait1
dec count
bne wait1
dec count+1
bmi finished
wait1
bit irqst	; Test BREAK key
bpl finished
lda #$10
wait2
bit irqst
bne wait2
lda pokmsk
sta irqen
ora #$10
sta irqen
bne serout_loop
finished
lda #$ff
sta brkflag
lda #0
ldx #8
clr2
sta audf1,x
dex
bpl clr2
sta skres
lda #3
sta skctl
lda pokmsk
and #$7f
sta irqen
ora #$80
sta irqen
lda #$40
sta nmien
cli
rts
;
outbyte	.byte $00
freq	.word 0
count	.word 0

 

 

[HiassofT]

Hi!

 

i need exact or rather acceptable values of "0" and "1" durations when pokey is transmitting the data at various speeds

I hooked up my logic analyzer and captured a "read sector" command at standard speed (sampled with 1µs resolution) and 1050 Speedy high speed (pokey divisor 9, sampled with 500ns resolution).

 

At standard speed Hi is slightly shorter than Lo (usually something like 51/53 or 52/54 µs), at high speed both Hi and Lo were usually equally long (18µs).

 

I've attached the captures in VCD format, you can use gtkwave on Windows or Linux to view the data. If you need more samples just drop me a line.

 

so long,

 

Hias

 

Command frame at standard speed:

 

Command frame at divisor 9 (~55kbit):

 

Captured data: sio-read-vcd.zip

Edited February 18, 2010 by HiassofT

[HiassofT]

Another capture: AtariSIO running at pokey divisor 1 (~110kbit), sampled at 100ns resolution.

 

Command frame plus "ACK" from AtariSIO:

 

VCD data: 110k-vcd.zip

 

so long,

 

Hias

[Rybags]

Hi Hiass.

 

Are you still hooked up? Can you try my program?

[candle]

110kbit seems to be out of range - it would be 8 cycles per bit (rough estimate) - not much time when it comes to 6502

[HiassofT]

Are you still hooked up? Can you try my program?

No problem, I ran several tests (at divisor 40, 16, 8, 6, 1 and 0), all sampled at 10ns resolution (the highest my logic analyzer supports). I've scaled the screenshots so that they each show ~2.5 bytes, so keep an eye on the timescale at the top.

 

BTW: I'm using a PAL 800XL.

 

Divisor 40:

 

Divisor 16:

 

Divisor 8:

 

Divisor 6:

 

Divisor 1:

 

Divisor 0:

 

Captured VCD data: rybags-vcd.zip

 

so long,

 

Hias

[HiassofT]

110kbit seems to be out of range - it would be 8 cycles per bit (rough estimate) - not much time when it comes to 6502

Sure, this is too fast for the good old 6502. But divisor 6 should be easily doable (the 1050 Turbo uses this speed).

 

so long,

 

Hias

[Rybags]

I don't get it - that data looks like $55... I'm sure I had the Basic program using $AA. Or did you change it to make it easier to pickup where the start/stop bits are?

[HiassofT]

Hi!

 

I don't get it - that data looks like $55... I'm sure I had the Basic program using $AA. Or did you change it to make it easier to pickup where the start/stop bits are?

No, I didn't change anything. But to me the samples look fine (MotorControl is just shifted a little bit - some 21-34µs). In the bitstream there are 2 high bits (MSB + stop bit) followed by 2 low bits (start bit + LSB), the other bits (1..6) are alternating 1/0 - so the transmitted byte is $AA.

 

so long,

 

Hias

[atariksi]

Try this one - quick BASIC + Asm program. Haven't tested it with CRO, but it should work.

 

It toggles the motor control line with each byte sent. Value of byte sent can be changed, variable SEROUT.

You can alter number of packets sent (Count) as well as AUDF value (0..65535).

Each packet is 256 bytes, entire transmission is sent continously without any gaps. Naturally, no SIO protocols, command line, etc is used. Just pure output direct to Pokey.

 

Continuous mode just endlessly sends the packets as specified, press Reset to get out of that one.

 

siotest1.bas

 

Assembler program:

 

 

 

*=$600
;
;
; SEROUT Test
; 
; USR(routine,serout_value,count,trans_freq)
;
pokmsk	= $10
brkflag = $11
audf1	= $d200
audc1	= $d201
audc2	= $d203
audf3	= $d204
audc3	= $d205
audf4	= $d206
audc4	= $d207
audctl	= $d208
skres	= $d20a
serout	= $d20d
irqen	= $d20e
irqst	= $d20e
skctl	= $d20f
pactl	= $d302
nmien	= $d40e
pla
pla
pla
sta outbyte
pla
sta count+1
pla
sta count
pla
sta freq+1
pla
sta freq
sei
lda #0
sta nmien
ldx #8
clr1
sta audf1,x
dex
bpl clr1
sta skres
lda #$28
sta audctl
lda pokmsk
ora #$10
sta irqen
lda #$aa
sta audc4
sta audc3
sta audc2
sta audc1
lda freq
sta audf3
lda freq+1
sta audf4
lda #$23
sta skctl
ldx #0
serout_loop
lda outbyte
sta serout
lda pactl
eor #8
sta pactl
dex
bne wait1
dec count
bne wait1
dec count+1
bmi finished
wait1
bit irqst	; Test BREAK key
bpl finished
lda #$10
wait2
bit irqst
bne wait2
lda pokmsk
sta irqen
ora #$10
sta irqen
bne serout_loop
finished
lda #$ff
sta brkflag
lda #0
ldx #8
clr2
sta audf1,x
dex
bpl clr2
sta skres
lda #3
sta skctl
lda pokmsk
and #$7f
sta irqen
ora #$80
sta irqen
lda #$40
sta nmien
cli
rts
;
outbyte	.byte $00
freq	.word 0
count	.word 0

 

 

 

I suppose you could write it in a cycle-exact manner and avoid the poll/check at irqst to see when to send next byte (if you needed the cycles or speed).

[candle]

than for all Your input

From now on, development of new firmware is passed on Mikey (AtariArea forum member) and thus out of my hands - i'll get myself another 1050 this time with happy warp installed

just for a comprasion and possible some more hardware development

 

features planned are:

 

double density support

ultraspeed

track buffer

user flashable (from atari level) rom disk

 

there is enought storage inside to fit 360kbytes atr image, so the future looks promissing

 

hopefully we will get there soon

 

i wonder whether to leave "debug interface" be or not, but its tempting to add support for small (2x8 chars) text lcd display, but thats soleyly up to end user

 

my goal when starting this project was to enable stock 1050 users to get affordable and quite high-tech upgrade for their drives, as all other solutions that were present in one point of time are becoming obsolete due to parts used

[ivop]

Perhaps slightly related (might be handy for development/testing of upgrades), did anybody ever considered writing a hardware level Atari 1050 emulator?

[Rybags]

Of course... I forgot. LSB is transmitted first, so my data should have been $55 instead of $AA.

[+CharlieChaplin]

Hello

 

For two weeks or so I and Mikey from AtariArea forum are developing new extension board for Atari 1050

 

it has 6507 cpu, 512 of banked ROM and 32k of banked RAM, so its possible for this hardware to beat up Speedy, HappyWarp or any other 1050 extension that was build in the past

 

 

 

hmm,

the original Speedy by Compyshop did have only 16k (came with Bibodos and/or Sectorcopy onboard), but later versions by Reitershan and Klaus Peters had 32k (came with TurboDOS XL/XE by Reitershan, Diskcopy, Filecopy and other programs onboard). Later Speedy compatible versions, like the Floppy-2000, the Speedy-XF and probably also the HDI (high-density-interface by Erhard Puetz to connect up to four 5,25" or 3,5" PC drives to the XL/XE) came with 32k or 64k. There even was a Super Speedy by Compyshop with 192k or 256k RAM onboard and a special copy-program which could copy a whole S/M/D (reading+formatting+writing 90k/130k/180k) diskette within 9-11 seconds without any computer intervention (the disk was read, formatted and written with the drive`s own RAM) and as a special bonus this Super Speedy copy program could also copy most copy-protected disks (it did not remove the copy protection, instead it created copies that were copy-protected like the original disk). Alas, only 10 Super Speedy boards were ever made - Abbuc and Sascha Roeber (the owner of all Power per Post / Werner Raetz copyrights) do own one or more of them. Wolfram Fischer / mega-hz once wanted to re-build the Super-Speedy but until now, he didn`t...

 

The adverts said, that a Speedy in ultraspeed mode works with 76,800 Baud, with High-Speed-Sector-Copy it would work with approx. 96,000 Baud (there was no word anywhere how fast a Super Speedy is). Of course the real baudrate in ultraspeed mode was "a little" lower, somewhere between 50-55 KBaud. How fast is your 1050E compared to a Speedy in ultraspeed mode or compared to a Super Speedy (how long does it take to read+format+write a whole 90k/130k/180k disk) ?!?

 

-Andreas Koch.

[Mathy]

Hello Andreas

 

IIRC the SuperSpeedy doesn't do all that in just 9 seconds. But it was that fast either reading, writing or formatting (I'ld guess the first) and comparably fast on the other tasks.

 

greetings

 

Mathy

 

[edit: BTW didn't R.I.K. of Kaisersoft also own one?]

Edited February 21, 2010 by Mathy

[candle]

hi Andreas

i cannot answet Your question

time will tell, but if boards You've mentioned (with exception of HDI) - i mean the ones that actually fit inside 1050 drive - ware using the same clock that 1050 is using (1mhz) then it should be as fast as others

[+bob1200xl]

The disk spins at 300RPM. With a sector skew of one, you can read 5 tracks per second if you are really good. On a 40 track drive, it will take 8 seconds to read the whole disk.

 

If you format carefully, (start each track with just enough offset to allow the head to seek) you can do 10 seconds, maybe 9.5. Never going to go faster than that...

 

Bob

 

 

hi Andreas

i cannot answet Your question

time will tell, but if boards You've mentioned (with exception of HDI) - i mean the ones that actually fit inside 1050 drive - ware using the same clock that 1050 is using (1mhz) then it should be as fast as others

[mikey]

Hello,

 

1050E just got Double Density support. Developing track buffer and ultraspeed sio now. Stay tuned.

And btw, thanks go to hias for the waveforms.

Edited March 2, 2010 by mikey

[Defender II]

I didn't see if anyone mentioned this in the previous posts so...

 

ICD USD had two ROM versions depending on the jumper configurations of the 1050 PCB.

You need to match that as well as double the RAM, which was all the big ICD epoxi blob was (2 stacked RAM).

 

Will you be including the archiver capabilities?

[mikey]

Will you be including the archiver capabilities?

 

If by archiver you mean 'raw FM/MFM track copy' then I think it's not in my goals list.

If you mean just a track buffer for compensating read/write speed - then sure.

Also, the drive is going to be completely 'firmware' flashable, so if I come up with a new 'feature'

adding it will be possible for the end users.

HTH

 

m.

[tregare]

I didn't see if anyone mentioned this in the previous posts so...

 

ICD USD had two ROM versions depending on the jumper configurations of the 1050 PCB.

You need to match that as well as double the RAM, which was all the big ICD epoxi blob was (2 stacked RAM).

 

Will you be including the archiver capabilities?

 

 

I know that there was a mask rom version of the USD ('cause I have one) it is a rockwell produced chip. that one was used if you had a Mask ROM 1050, then there is the 2732 EPROM version, that was used if you had an EPROM configured 1050. (2532 addressing versus 2732 addressing) if you have the jumpers in for a mask rom, a 2532 eprom will work in place of the mask rom (IIRC)

 

I don't remember any differences in the content, just the package. ('course I could be wrong)