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AND in assembly

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Hi.

 

What is the best way to emulate AND in assembly? The TI provides us with ANDI, but I need to AND 2 registers together. Why there is no built in AND function is a mystery to me...

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That is a mystery to everyone. :) I think the only way to AND two registers is to overwrite the immediate value of and ANDI at runtime. Let me see if I can make an example that works...

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SOC is a logical OR operation. It can take any source and destination types (register, indirect, symbolic, indexed). Why they didn't call it "OR" is beyond anyone.

 

The SZC does: DST = DST AND (!SRC)

 

So, if you do a 1's complement (invert) the source register first, SZC will do your AND operation:

 

      LI   R1,>FF00
      LI   R2,>2020
      INV  R1          R1 = NOT R1
      SZC  R1,R2       R2 = R2 AND (NOT R1)

 

If you need the original source then you will have to do another INV R1 after the instruction.

 

The last option would be to overwrite the immediate of the ANDI instruction, or use the X instruction (probably the safest):

 

      DEF  MAIN

MYWS   EQU  >8300

* In the data section ...
ANDX   ANDI R1,0
ANDOP  EQU  ANDX+2      * Memory address of the ANDX immediate value

.
.
.

MAIN   LIMI 0
      LWPI MYWS

      LI   R1,>FF00
      LI   R2,>2020
      MOV  R2,@ANDOP
      X    @ANDX

* Or, the direct modification

      LI   R1,>FF00
      LI   R2,>2020
      MOV  R2,@ANDX2+2
ANDX2  ANDI R1,0

 

The nice thing about the SOC and SZC methods is that they have byte versions, SOCB and SZCB, and can take all 4 memory access types for both the src and dst. For AND you just have to do and INV on the source, and again afterwords if you care about the original src value.

Edited by matthew180
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SOC is a logical OR operation. It can take any source and destination types (register, indirect, symbolic, indexed). Why they didn't call it "OR" is beyond anyone.

 

The SZC does: DST = DST AND (!SRC)

 

So, if you do a 1's complement (invert) the source register first, SZC will do your AND operation:

 

      LI   R1,>FF00
      LI   R2,>2020
      INV  R1          R1 = NOT R1
      SZC  R1,R2       R2 = R2 AND (NOT R1)

 

If you need the original source then you will have to do another INV R1 after the instruction.

 

The last option would be to overwrite the immediate of the ANDI instruction, or use the X instruction (probably the safest):

 

      DEF  MAIN

MYWS   EQU  >8300

* In the data section ...
ANDX   ANDI R1,0
ANDOP  EQU  ANDX+2      * Memory address of the ANDX immediate value

.
.
.

MAIN   LIMI 0
      LWPI MYWS

      LI   R1,>FF00
      LI   R2,>2020
      MOV  R2,@ANDOP
      X    @ANDX

* Or, the direct modification

      LI   R1,>FF00
      LI   R2,>2020
      MOV  R2,@ANDX2+2
ANDX2  ANDI R1,0

 

The nice thing about the SOC and SZC methods is that they have byte versions, SOCB and SZCB, and can take all 4 memory access types for both the src and dst. For AND you just have to do and INV on the source, and again afterwords if you care about the original src value.

 

The SZC example seems to be the easiest. Thanks! One question though: wouldn't ANDI R1,0 simply place >0000 in @ANDX2+2 and replace its content?

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The "immediate" value is part of the instruction in memory. The >0000 is just a place holder since the assembler needs a value. The opcode is 2-bytes in memory, and the CPU will look at the two byte immediately following the opcode for the immediate value, which we replace at runtime prior to the CPU fetching the immediate value. Note that if the code is in ROM you cannot do this. Also, this kind of self modifying code is illegal on modern processors with run levels, or with processors that read ahead and precache instructions. However, we can do it on our 9900 and that is part of what makes coding on older computers fun.

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The "immediate" value is part of the instruction in memory. The >0000 is just a place holder since the assembler needs a value. The opcode is 2-bytes in memory, and the CPU will look at the two byte immediately following the opcode for the immediate value, which we replace at runtime prior to the CPU fetching the immediate value. Note that if the code is in ROM you cannot do this. Also, this kind of self modifying code is illegal on modern processors with run levels, or with processors that read ahead and precache instructions. However, we can do it on our 9900 and that is part of what makes coding on older computers fun.

 

Self-modifying code can also be a real pain to debug as well... after all, you don't have a static "source" to follow.

 

Quite right about it not working on modern systems... just think of all the damage a virus could do with something like this.

 

Adamantyr

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The "immediate" value is part of the instruction in memory. The >0000 is just a place holder since the assembler needs a value. The opcode is 2-bytes in memory, and the CPU will look at the two byte immediately following the opcode for the immediate value, which we replace at runtime prior to the CPU fetching the immediate value. Note that if the code is in ROM you cannot do this. Also, this kind of self modifying code is illegal on modern processors with run levels, or with processors that read ahead and precache instructions. However, we can do it on our 9900 and that is part of what makes coding on older computers fun.

Got it. Pretty cool though :)

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