Fastest clock speed for 63C09

[Multijointed Monster Maker]

I'm almost finished planning out the specifications and memory map of a homebrew video game system. The VDP will be clocked at 14.32 Mhz, using a 7.16 Mhz pixel clock rate. For convenience, I plan on using either a 7.16 Mhz 63C09 or dual 3.58 Mhz 63C09s.

 

However I'm not quite sure if 63C09s are capable of running at 7.16 Mhz. Some people say the maximum speed is about 7 Mhz, while others claim it's around 5 Mhz. Who's right?

[potatohead]

You should ask on this list. If there is something to know about the '09 chips, these guys probably know it.

 

http://five.pairlist.net/mailman/listinfo/coco

[JamesD]

Search for HD63C09. I believe the max is 3MHz.

I think it's a moot point since they will probably be impossible to find these days... unless you already have a source for the chip.

<edit>

Correction, it's rated for 3MHz. It should run faster. 3.58 MHz would probably be safe but a heatsink would be a must if you go very fast. I don't think 7.16 MHz would be reliable.

Edited December 28, 2010 by JamesD

[JamesD]

I hope this link works. Datasheet

[JamesD]

There is a free VHDL 6809 core that will handle 25MHz btw.

[Multijointed Monster Maker]

If I'm using 63C09s, I'd clock it at 3.58 Mhz, and forget about dual processing.

 

The free VHDL 6809 core sounds interesting though. I might use that because I'm trying to get the most out of as minimum hardware as possible.

[JamesD]

I did find some places that claimed to have 63C09 CPUs but they appeared to be brokers rather than the actual people that have them. I'd try to find the actual place that has them and request a price.

[Multijointed Monster Maker]

I was drawing a (not so detailed) diagram of the circuit for the VDP core, and I realized the VDP needs to be 28 Mhz not 14 Mhz. Eventhough it access it's V-RAM at 14 Mhz, it needs to buffer the pixels to it's scanline buffer at 4x the pixel rate. This can also make designing the hardware a little easier because the VDP can now use an 8-bit bus for v-ram and color-ram.

 

The currently planned technical specifics are:

 

*336x224 screen resolution

*168 sprites (sizes range from 16x16 to 16x256)

*horizontal sprite joining

*84 16x16 sprites per scanline

*32768 colors

*256 colors at once

*16 colors per 16x16 sprite block

*64 kB V-RAM + 512 bytes Color-RAM

*transparency

 

It doesn't use hardware backgrounds, but it can be implemented by joining together 22 16x256 sprites.