Altirra Hardware Ref Guide

[phaeron]

Short update, as there was a request for a version with a updated TOC:

• Additional behavior info on Happy 1050 track buffering, including error handling.
• New appendix on tape format and decoding.

 

HWMan-20220103.pdf

[ijor]

Hi Phaeron,

 

Quote

ANTIC supports a third type of NMI, triggered by the System Reset button on 400/800 models. On these models, the System Reset button asserts the /RNMI input on ANTIC, and once this is held for at least two consecutive leading edges of VBLANK, the Reset NMI is triggered.

 

This is not accurate. I didn't actually test the hardware, but I assume you didn't either and you are just misinterpreting my schematics. I attached the relevant section of the schematics below, but added names for a couple of signals to help in the description.

 

 

The second latch, named XRNMI_DELAY2, is inverted in relation to the first one named RNMI_DELAY. You can see that there are three inversions (one NOR and two inverters) between the first and the second latch. The logic actually works as an edge detector. Then Reset NMI is triggered when the RNMI pin was asserted at the start of the last vertical blank, but it wasn't at the start of the previous one.

 

Edited July 4, 2022 by ijor

[phaeron]

6 hours ago, ijor said:

This is not accurate. I didn't actually test the hardware, but I assume you didn't either and you are just misinterpreting my schematics. I attached the relevant section of the schematics below, but added names for a couple of signals to help in the description.

I tested it as far as verifying the timing of the Reset NMI interrupt relative to vblank, but wasn't able to verify the delay due to the inaccessibility of the 800's CPU board. I'll update the doc.

[Rybags]

Is this in aid of debounce or something?

[ijor]

7 hours ago, Rybags said:

Is this in aid of debounce or something?

No, no debouncing here. It is just an edge detector and alignment with the vertical blank.

[phaeron]

Minor refresh:

• Various corrections from readers.
• Expanded information on light pens, and quirks of the CX-75.
• ComputerEyes Video Acquisition System.
• 1050 rev. E firmware.

HWMan-20220707.pdf

[FULS]

Thank you for the "ComputerEyes Video Acquisition System" addition.

I love the graphics of the Atari. That's why I bought ComputerEyes when I was 24 in 1984.

I took a vacation in Florida that year and bought some post card that I digitized with ComputerEyes.

Click the link below and Load with Basic Enabled.

 

Fuls Digitized Pictures

 

Very interesting read, even though portions of it are over my head in my ever aging brain.

Edited July 8, 2022 by FULS

[ijor]

On 7/4/2022 at 9:56 AM, Rybags said:

Is this in aid of debounce or something?

Wanted to post this the other day, but forgot. I answered without thinking before, sorry. Yes, by aligning the edge to the vertical blank, it does perform some kind of debouncing. Since the RNMI signal is sampled only at a single cycle per video frame, oscillations at the middle of the frame are completely ignored.

 

[phaeron]

Update:

• Disk drives

  • Added info about XF551 firmware rev. 7.4 and 7.7 differences.

  • Added US Doubler firmware information.

• POKEY

  • More details on initialization mode.

  • Expanded on many audio topics.

  • Rotated around some of the noise generator patterns to canonically start from initialization state.

  • Cycle-precise timer behavior, including STIMER and AUDF1-4 write timing.

This is the special page of the update -- it's related to all of the weird POKEY timing stuff I've been doing in Altirra and Acid800.

HWMan-20221129.pdf

[+DrVenkman]

17 hours ago, phaeron said:

• POKEY

  • More details on initialization mode.

  • Expanded on many audio topics.

  • Rotated around some of the noise generator patterns to canonically start from initialization state.

  • Cycle-precise timer behavior, including STIMER and AUDF1-4 write timing.

This is the special page of the update -- it's related to all of the weird POKEY timing stuff I've been doing in Altirra and Acid800.

Hey @Synthpopalooza - just in case you're not following this thread already ... this is RIGHT up your POKEY-tastic alley. 

[phaeron]

• Accessories
  • Stack Lightpen.
• Cartridges
  • SIDE 2: Added missing CF select bit.
• Serial I/O bus
  • Fixed typo in protocol diagram that showed 10-18 ms for the ACK-to-data delay instead of 1.0-1.8 ms.
  • 1030: Additional timing and dialing information.
• Disk drives
  • Happy 1050: Detailed memory map and additional caching behavior.
  • XF551: Added third firmware version between 7.4 and 7.7.
  • Added 1450XLD parallel disk drive.
• Parallel Bus Interface
  • MIO: Fixed description of $D1FE bit 4, which controls SEL and not MSG.
  • MIO: Fixed inverted IRQ status bits.
  • Added 1400XL/1450XLD V: and T: devices.

HWMan-20230529.pdf

[+wavemotion]

Avery - thanks for your continued effort to document the 8-bit hardware. I’ve found your reference to be to be the pinnacle of information on the system - even surpassing the venerable Mapping the Atari as my go-to guide. I don’t always understand everything (a reflection of the reader, not the writer)… but I feel smarter after having gone through it 🤓🤪😁

[Teapot]

Such an amazing document. So useful even though I've barely been through 20% of it so far.

 

Here's a couple of things I noticed over the past few months.

 

Right at the top of p.59 it states the NTSC dot clock is "12.2727Hz" which seems kinda slow.

 

VSCROL Figure 3 is in the HSCROL section (p.68). In the current version the text describing it is on the next page along with a big gap of empty space (probably because of the next image).

 

[phaeron]

18 minutes ago, Teapot said:

Right at the top of p.59 it states the NTSC dot clock is "12.2727Hz" which seems kinda slow.

That's the NTSC dot clock for square pixels with interlaced video, not the dot clock that the NTSC Atari actually uses (7.16MHz non-interlaced).

 

18 minutes ago, Teapot said:

VSCROL Figure 3 is in the HSCROL section (p.68). In the current version the text describing it is on the next page along with a big gap of empty space (probably because of the next image).

LibreOffice Writer pagination problem during PDF export. It's a floating frame that the text should flow around and is fine in the editor, but got that gap on export for some reason. I've hit a lot of Writer bugs while working on this doc.

 

The layout is always a bit suboptimal anyway because Writer doesn't have the frame positioning mode I actually want, which is page-relative on the next page. In a professional environment this would probably be handled by manual layout, but it's too much work to relayout all of the figures every time I make an edit.

[Teapot]

5 hours ago, phaeron said:

5 hours ago, Teapot said:

Right at the top of p.59 it states the NTSC dot clock is "12.2727Hz" which seems kinda slow.

That's the NTSC dot clock for square pixels with interlaced video, not the dot clock that the NTSC Atari actually uses (7.16MHz non-interlaced).

But is it Hz or MHz?

 

5 hours ago, phaeron said:

LibreOffice Writer pagination problem during PDF export. It's a floating frame that the text should flow around and is fine in the editor, but got that gap on export for some reason. I've hit a lot of Writer bugs while working on this doc.

I thought it might be something like that. I guess I was hoping there was a way to attach it more insistently to a paragraph.  You're absolutely right not to fight against bugs like this.

[+Stephen]

25 minutes ago, Teapot said:

But is it Hz or MHz?

I have read that as MHz every time - in your original post, and phaeron's reply.  I'm usually really god at spotting things like that too.

[phaeron]

1 hour ago, Teapot said:

But is it Hz or MHz?

Ha, I'll fix that.

 

1 hour ago, Teapot said:

I thought it might be something like that. I guess I was hoping there was a way to attach it more insistently to a paragraph.  You're absolutely right not to fight against bugs like this.

You can anchor to paragraph, but that's actually part of the problem -- because the frame itself takes up space before its own anchor. Which can cause a nice problem if the frame takes enough space to push its own anchor to the next page.

 

It's also not really what I want anyway, because I want the diagram to appear after the text that introduces it, not before. (This isn't the XML standard, we introduce concepts before discussing them.) I took a look at the source document again and it looks like this is actually a consequence of the anchor not being far down enough:

 

 

In this case, I'm cheating a little bit by anchoring it to the last paragraph in that section, but the layout engine had to push everything to the next page. Now, why the layout was different in the PDF export is another question, but in general this is the price of using auto layout in a word processor instead of manual layout in desktop publishing software.

 

I do try to tweak things a bit when I can to make things look a bit more professional. Sometimes this requires awkward workarounds due to Writer limitations. For instance, Writer doesn't allow creating PDF bookmarks without inserting actual header text into the document -- which in the Reference section is done with tiny 2 pt. invisible text. The gradient on the front cover is also a stretched image because there was a visual issue with Writer's PDF export, it was doing something silly like posterizing the gradient to 6-bit and then tessellating the bands into geometric solid color shapes. But I digress.

 

[ClausB]

3 hours ago, Stephen said:

I'm usually really god at spotting things like that too.

Stephen, the proofreading god.

[Teapot]

I have some more:

 

8.1 Late hardware reset:

One symptom that this can cause is a cartridge that fails to reliably run a software image configured a diagnostic cartridge to the OS

 

Probably "configured as a diagnostic"

 

 

8.2 MaxFlash 8Mbit cartridge:

Bank switching is performed by either read or write accesses to $D500-D5FF, where address bits 0-7 control the bank and bit 7 disables the cartridge when set.

 

Probably "bits 0-6"

 

[phaeron]

• ANTIC
  • Fixed a long standing off-by-one error in the VCOUNT cycle numbers from when the horizontal cycle numbers were adjusted in this doc by -1, then adjusted back; the +1 was not reapplied to the VCOUNT numbers.
  • Added information about precise timing of interrupts that occur during a WSYNC wait.
• POKEY
  • Clarified serial input/output clock selection table and added captures of SIO clock in/out signals.
• CTIA/GTIA
  • Added horizontal/vertical sync timing information, including effects of the ANTIC hires bug.
• Cartridges
  • Corrected typo in banking bit range for AtariMax 8Mbit cartridges.
• Serial I/O bus
  • Added information about the 835 modem.
  • Expanded information about the 1030 modem.
• Disk Drives
  • 810: Added note about rev. E FDC error codes.
  • 1050: Added write protect error behavior.
  • Happy 1050: Added information about relations between Happy 1050 firmware revisions and base 1050 firmware revisions.
  • XF551: Added note about oversize firmware ROM and lower 4K CRCs.
• Parallel Bus Interface
  • Added interaction between Ultimate1MB extended memory and PBI memory overlays.
• Internal devices
  • VBXE: Expanded MEMAC window description.
• Reference
  • Corrected swapped serial input and keyboard overrun bits in register grid (the description was fine).
• Physical Disk Format
  • Corrected error in DAM handling: post-1771 FDCs report bit 1, not bit 0, of the Data Address Mark.
• Analog Video Model
  • New section on synchronization and fake interlace behavior.

HWMan-20231009.pdf

[+slx]

I always plan to have a copy printed but with the frequent updates there's never the right time 😜. Thanks @phaeron for taking this ever further! The Atari community is really blessed with so many people working on documenting Atari stuff, be it projects like yours or archiving old software, magazines, etc. 

[Rybags]

I'd have to check again as my info is a bit rusty.

But hires on final scanline is possible without distortion, though the fix involves hitting DMACTL at the right time during that scanline then leaving playfield DMA at 00 until after VSync.

Something like that anyway but bottom line was it was a fair bit of effort for not a lot of gain.