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Did someone order a Channel FPGA? (FPGA Channel F)

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Welll, as I might've previously threatened, I took a few days to make an FPGA Channel F! (Channel FPGA if you will). After the Studio 2 FPGA I did earlier, I thought it'd be fun to try to simulate another underdog console.

 

It took me about 4 days to get this one done, start to finish. Complete ground up everything. F8 CPU, 3853 SRAM interface, and video buffer. I cheated a little on the video buffer. The original buffer isn't terribly NTSC standards compliant. It uses 224 clocks per scanline instead of 228, and there's 264 scanlines instead of 262. Old 1970's TVs were fine with this, but capture cards and modern TVs probably don't take too kindly to that.

 

I ended up with a 228 clock per scanline and 262 scanline frame to make it "NES like", which is good enough for most modern stuff. The audio circuitry was a direct clone, however, so pitch should be accurate. All games run perfectly as far as I can tell, and audio sounds like the various youtube videos I could find.

 

This implemention runs on my standard FPGA board I made, along with all the other systems. Bottom of the post has dirty technical details for those that swing that way.

 

Enough of that, on with the pictures!

 

channelf_goodstart.JPG

A good start- the G? selection screen.

 

 

channelf_hockey.JPG

 

Built in game, hockey

 

 

channelf_doodle.JPG

quadradooooooooooodle

 

channelf_alien_invaders.JPG

Alien Invaders

 

 

channelf_chess.JPG

 

Chess, requires extra RAM to function

 

channelf_maze.JPG

Maze (also needs extra ram, sitting on some IO ports. yep, got that)

 

channelf_pacman1.JPG

Pac-man homebrew. (title screen)

 

channelf_pacman2.JPG

 

In game. This game appears to be for a PAL Channel F maybe- the top and bottom get cut off a bit, but the game plays just fine.

 

 

Technical details:

 

Resource usage by entity:

 

Cyclone EP3C25 FPGA

F8 CPU: 723 LEs

F3853 SRAM interface: 334 LEs

framebuffer: 121 LEs

generic SDRAM: 243 LEs

 

This is approximately 6% of the FPGA's resources.

 

(LE = logic element, the "currency" of FPGAs. my chip has 24624 LEs total)

 

The F8 CPU was real "interesting" to simulate. I suspect the designers were under the influence when coming up with that particular bus state / 8 bit bus architecture. There's only a single level hardware stack for calls, no subtracts, jumps and calls corrupt the accumulator (loads PCH of new address into it for temp storage), and the slowness. dreadful slowness.

 

The Channel F's frame buffer is slooow too. You can only write 1 new pixel every scanline, so a maximum of around 16Kpixels/second. This is why clearing the screen or updating too many things is dreadfully slow.

 

Audio was straight forward but had a few wrinkles. If the sound is left on, it will go silent on its own after about 35ms. I noticed in some emulators the sound would continue long past the point it should've been silent because they did not implement this timeout. (It's done on the original hardware using a capacitor).

 

I had a bunch of issues figuring out how the background select bits worked, and the 2102 SRAM on the Maze cart was connected. Some code disassembly helped with that.

 

Overall, this system was extremely easy to simulate. The F8, while weird, ended up being pretty painless to implement and debug. Time taken was as follows:

 

Tuseday - implement F8 CPU verilog, generate the bus state table.

Wednesday - implement F3853 SRAM interface doodad (generates the address bus, and controls IO ports). Do some basic CPU testing

Thursday - implement frame buffer. Do more CPU testing and debugging. CPU mostly debugged at this point

Friday - no work

Saturday - Fix final F8 bug (BR7 opcode). Implement XDC instruction- not listed on the datasheet. Demo cart 2 needs it. Add 2102 SRAM doodad.

 

So about four days of work. I used signaltap (a built in "logic analyzer" in the Quartus 2 dev software) extensively to debug the system. Here's what that looks like for the curious. This is showing the various signals in the project. This is what happens at reset. The "Dbus" signal is the F8's data bus and the values on it, RST is reset, and ROMC is the 5 bit ROM control bus. "write" is the F8 write signal. These are a replica of the real chip's pin states.

 

The capture starts when reset goes low to start operation (Yes my signals are all positive polarity even though the real chip's signals might not have been. standardization was used to keep things consistent).

 

channelf_debug.png

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KRIKzz may be interested in these. I know he wanted to add some emulators to some of his carts like the Mega EverDrive, which uses the Cyclone II. Would this be something you would be interested in?

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Welll, as I might've previously threatened, I took a few days to make an FPGA Channel F!

Dude you're awesome!

Why does it seem like you're not around very much, this is the first real post i've seen of yours in years, do you not have time for your video game hobby?

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This is approximately 6% of the FPGA's resources.

 

You should allocate the rest to bitcoin mining. Sell this to gamers under cost and have them mine for you :)

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First, thanks everyone for the kind words!

 

Dude you're awesome!

Why does it seem like you're not around very much, this is the first real post i've seen of yours in years, do you not have time for your video game hobby?

 

 

Oh I'm around, I tend to stick on IRC. I don't make too many updates to my web page since it's a huge pain and I need to dump it and start from new. I have been working on various things and making lots of FPGA containing projects. My youtube channel (name: kevtris) has videos of the various FPGA doodads I have made in the last couple of years. I have not dropped out of the hobby by any means, but my methods have changed over the years. These days I tend to throw an FPGA at most problems that are somewhat large, or microcontrollers at the smaller problems. I kinda miss the discrete logic days, but only sometimes. I did make that NANDputer though- a computer completely out of NAND gates. That's on the blog (blog.kevtris.org). There's a few videos of it doing some basics on youtube also.

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First, thanks everyone for the kind words!

 

 

 

 

Oh I'm around, I tend to stick on IRC. I don't make too many updates to my web page since it's a huge pain and I need to dump it and start from new. I have been working on various things and making lots of FPGA containing projects. My youtube channel (name: kevtris) has videos of the various FPGA doodads I have made in the last couple of years. I have not dropped out of the hobby by any means, but my methods have changed over the years. These days I tend to throw an FPGA at most problems that are somewhat large, or microcontrollers at the smaller problems. I kinda miss the discrete logic days, but only sometimes. I did make that NANDputer though- a computer completely out of NAND gates. That's on the blog (blog.kevtris.org). There's a few videos of it doing some basics on youtube also.

Are you sick of green wire yet? ;)

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Hey!

 

I've missed this one.

Are you sharing "hoe to make your own Channel FPGA"-instructions or will this project die with you? ;-)

 

This would be excellent in a portable and also for making carts when they run out of 3853 Static Memory Interfaces!

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Awesome- does mean I can stop using my original working Channel F and have easy replacements available?

 

Now that this is done, an Astrocade FPGA must be coming right up!

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Someone needs to design a small woodgrain replica of the Channel F case to hold one of these :D

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Someone needs to design a small woodgrain replica of the Channel F case to hold one of these :D

Urk please no, not those tasteless things :D If you really wanna go to a replica of the time, go with the Nordmende design :

nord-0-enh.jpg

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But don't use network cable as joystick replacement cable...

I wonder if they made even more gadgets with the same shell?

video_typer_laufschrift_generator_0_1420

I like the 80's look of the ITT, it's also the smallest one:
itt_telematch.jpg

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I was looking for something else but... nothing more became out of this, no modern 3853 replacements to use in new games... nothing?

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