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tcdev

FØ0 & FPGA's

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Hi all,

 

I'm very new to the Atari scene and I'm currently playing around with emulating the Atari 800XL in an FPGA. I know, I know, you've heard it all before, blah blah. Well, it'll never get done if no-one makes an attempt - right?

 

Let me get my question out of the way first - I can't for the life of me find any reference to the frequency of FØ0 generated by the GTIA and fed into the ANTIC!?! Can anyone tell me what it is?

 

Back to FPGA's - I've seen a few different people announce similar projects over the years, but I don't know of anyone that has finished the job!?! Has anyone finished?

 

Anyway, I have the kernel ROM executing right up to the point where it loops polling the ANTIC VCOUNT register. So now it's time to start implementing the video chips. I've got my NTSC colour clock frequency, and my CPU frequency derived from that; but not sure how the ANTIC derives its 3.5MHz & 7MHz signals. I presume FØ0 is one or the other - yes?

 

The Atari sure is an interesting beast! I've done complete implementations of the TRS-80 (Models 1, 3 & Coco 1/2), a reasonably functional BBC Micro & Super80, and a very rudimentary Apple II. Not to mention dozens of arcade games. My project page is here. But the ANTIC & GTIA are like nothing I've come across before! I'm looking forward to the challenge!

 

So any help with FØ0 would be greatly appreciated!

 

Regards,

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Wrong info edited...

 

There is no true 7MHz clock in the Atari. GTIA takes a ~3.58MHz clock and derives a 7MHz clock for the high rez mode.

ANTIC.pdf

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fast phase 0 is gtia generated

master clock goes into gtia first then it enters antic and gets divided by 2 and then becomes phi0 for cpu

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Thanks! Ah, so the ANTIC doesn't actually require the colour clock then? Because it's fetching memory and nothing more, the fastest clock it requires is the CPU clock - right?

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internally, gtia works at 7mhz, but an-bus works at 3.5mhz (color cycle frequency)

antic fetches data when it has to, but at 1.7mhz clock, not 3.5mhz

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Whoops, it doesn't go to the CPU at all (and Ph0 would be an input anyway).. That's what I get for posting when I wake up to pee after 3 hours sleep. :)

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Thanks all that have replied to this topic!

 

I've hooked up my clocks, implemented VCOUNT in the ANTIC, and implemented the VBLANK interrupt. Now the kernel is hitting the ANTIC DMACTL & DLIST registers - exciting stuff!

 

Now the hard part... ;)

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Actually, I'm tempted to cheat a little here... I'm using a sizable FPGA and the entire 64KB RAM is implemented on-chip (with plenty of room to spare) so I'm thinking about simply using dual-port memory (for now) so the ANTIC can DMA happily without disturbing the CPU... although I'm aware that could cause some issues. It's just that the T65 core I'm using is a straight 6502 (no HALT# pin), though looking at the Atari schematics for the A800 they appear to simply disable Ø2 to the CPU if I'm not mistaken...

 

Just a quick 'n' dirty to make my job easier just to display something... or maybe I'll do it properly... hmmm...

Edited by tcdev
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so I'm thinking about simply using dual-port memory (for now) so the ANTIC can DMA happily without disturbing the CPU... although I'm aware that could cause some issues.

 

"Some issues" is nicely said. Actually, if you want to run any old game, you *need* to get the DMA timing right otherwise a lot of things break. The problem is really that most games need to synchronize to the screen somehow, but this critically depends on how many cycles are available for the CPU. It is probably not quite as bad as on the C64 where you don't have the VSYNC synchronization register, but you still need to know when VSYNC is triggered, and thus for which line you are waiting.

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"Some issues" is nicely said. Actually, if you want to run any old game, you *need* to get the DMA timing right otherwise a lot of things break. The problem is really that most games need to synchronize to the screen somehow, but this critically depends on how many cycles are available for the CPU. It is probably not quite as bad as on the C64 where you don't have the VSYNC synchronization register, but you still need to know when VSYNC is triggered, and thus for which line you are waiting.

It would just be until I can see something ("READY"?) on the screen... but now I'm thinking I'll just do it properly straight-up!

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Can anyone tell me about the HYSNC (CSYNC) timing in the GTIA? The ANTIC feeds VSYNC but only HBLANK, so it (GTIA) must generate HSYNC somwhere in the blanking period, but I'd like to know the exact timing if possible!?!

 

Starting to think the GTIA isn't as complicated as I first thought...

 

TIA

Regards,

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Hi tcdev :)

 

It's nice to hear that there is someone that wants to make a new HW :D

 

So, i'am working a bit on Super GTIA (nice name isn't :P) but for some unknown reasons i put this project on hold.But, before i started i made my homework.

There is a lot of useful informations provided by onkel google.

This is a set of must_read hings before You start:

 

http://www.bighole.nl/pub/mirror/homepage.ntlworld.com/kryten_droid/Atari/800XL/atari_hw/atari_display.htm

http://www.atarimax.com/jindroush.atari.org/atanttim.html (especially the last table)

http://www.beipmu.com/Antic_Timings.txt

 

And a little cherry on top: http://repo.or.cz/w/AtosmChip.git (it has been made by one of AA users from Poland)

 

 

And small tip about FØ0:

Following the ANTIC datasheet page 39 last 2 linef of the table: The rising edge of FØ0 is using by GTIA to synchronize with ANTIC data on ANx lines.

 

IMHO, If your are planing to make FUNCTIONAL clone of whole system, it may not be necesary to implement all the weird phase - clock dependencies. It was necessary because of late 70's (early 80's in best case) technology. In modern FPGA that may be much easier.

 

Regards,

Willy.

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read up on an bus inside antic docs

All I've found so far are the ANTIC, GTIA datasheets, the Altirra Hardware Reference Manual (which is very good) and various FAQ's and some schematics here & there. I'll keep looking for the above-mentioned docs - thanks!

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This is a set of must_read hings before You start:

Nice - this is exactly what I'm after - thanks!!!

 

And a little cherry on top: http://repo.or.cz/w/AtosmChip.git (it has been made by one of AA users from Poland)

Oh wow - is it finished? I haven't had a chance to look at it yet...

 

IMHO, If your are planing to make FUNCTIONAL clone of whole system, it may not be necesary to implement all the weird phase - clock dependencies. It was necessary because of late 70's (early 80's in best case) technology. In modern FPGA that may be much easier.

Yeah, mine will be all synchronous, rising-edge logic. I'm running a master clock of 16x colour clock, so if I need to interleave access, I can derive from this.

 

Thanks again!

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I have built most of an Atari in FPGA. Just needs the last few features then lots of debugging and some breakout boards for ports. I will post more info on Tuesday when back in the country.

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I have built most of an Atari in FPGA. Just needs the last few features then lots of debugging and some breakout boards for ports. I will post more info on Tuesday when back in the country.

Now they're coming out of the woodwork! Odd that I haven't heard of these efforts before!?!

 

I might press ahead with my implementation anyway (but I'd be interested to learn about you efforts too!) - it's a great way to learn about the Atari computers!

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It was going to be a surprise but I got weak reading your thread! I'm on gardening leave from work and needed a project. Been intending to do this for years but never had time. Will post status on Tuesday/Wednesday.

 

Don't want to discourage your efforts. Having two XL/XE hdl versions is far better than none:). Perhaps we can merge the best bits later.

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Heh, sorry for being at least partly responsible for ruining your surprise! :(

 

Actually on that point, it's not the first time I've started on an (FPGA emulation) project only to find that I wasn't the first (or only) one to work on it. So I guess I shouldn't be too surprised by these other projects...

 

In any case, I'm enjoying learning about the Atari so I'll continue for now at least... getting very close to the point where my GTIA will be generating the video signal and showing the background (borders)...

Edited by tcdev

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Have any of these various GTIA explorations/expansions gone anywhere? What is the state of the projects? I've wondered how the GTIA and ANTIC could be expanded in the 'proper' and graceful way? What sort of things can be done?

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Have any of these various GTIA explorations/expansions gone anywhere? What is the state of the projects? I've wondered how the GTIA and ANTIC could be expanded in the 'proper' and graceful way? What sort of things can be done?

Don't know anything about this particular project, but this one has an atari800 core:

 

http://harbaum.org/till/mist/index.shtml

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Does anyone here own/use a MIST? I'm just curious how good a job it does overall -- but it sure looks amazing! Especially, at Lotharek's it says that it emulates an A8 96%. Does pretty much everything work (except cartridges, I presume)?

 

-Larry

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Does anyone here own/use a MIST? I'm just curious how good a job it does overall -- but it sure looks amazing! Especially, at Lotharek's it says that it emulates an A8 96%. Does pretty much everything work (except cartridges, I presume)?

 

-Larry

 

I can vouch that it works really well -- it's a solid, well-built device. It has two joystick ports, can use paddles with the 2600 adaptor and will even load most cartridges in .car format.

 

The emulation accuracy of the A800 core seems pretty high -- and the author, foft, has been great about fixing issues as they are reported.

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I know this is an old topic, but I just wanted to second what others have said about the MIST board. It is amazingly accurate. Lotharek does a great job getting these out and the overall workmanship/quality is excellent. It also can be had with MIDI ports for use in Atari ST mode.

 

 

Sent from my iPhone using Tapatalk

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