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Potential new hardware


foft

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I can also verify that the 20131229 core runs on a newer DE1 board if sw7 is up (using SDRAM). No problem reading an SD card, bringing up dos 2.5, etc. Haven't tried too many games, but had issues getting Star Raiders loading from disk since it won't run when Basic is enabled and I don't know how to turn it off with this setup. I'd love to help you debug the SRAM issues as the new DE1 boards seem to be having issues running any core that uses SRAM. The new SRAM part is also 10ns, but it's likely that some of the other parameters have changed, i.e., address stable to chip select timing, etc.

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Hold down F4 to disable basic.

 

First 2014 version up. SD reading much more stable. There is a bug in my Pokey where the sio line gets stuck in some cases. I need to investigate further but for now have a workaround. There is also primitive scrolling support.

 

Some demos with custom loaders are still failing from SD. I have guests now though so likely won't get a chance to fix for a few weeks.

 

For those who didn't spot it NML32 has a spreadsheet in his footer with test results. Thanks for all the testing.

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I'd love to help you debug the SRAM issues as the new DE1 boards seem to be having issues running any core that uses SRAM. The new SRAM part is also 10ns, but it's likely that some of the other parameters have changed, i.e., address stable to chip select timing, etc.

Well if you're willing to give it a go I'm happy to send you the code. I'm planning to put it on my website soon, just more interesting modifying it:-)

 

In short I'm accessing it at 57MHz using this code. The timings are identical on the data sheet, but expect I'm breaching something or other. Its easy to make this n cycles long now if you fancy writing another version that is slower. Just assert 'complete' when finished.

 

ENTITY sram IS
PORT 
( 
	ADDRESS : IN STD_LOGIC_VECTOR(18 DOWNTO 0);
	DIN : IN STD_LOGIC_vector(15 downto 0);
	WREN : IN STD_LOGIC;
	
	clk : in std_logic;
	reset_n : in std_logic;
	
	request : in std_logic;
	
	width_16bit : in std_logic;
	
	-- SRAM interface
	SRAM_ADDR: OUT STD_LOGIC_VECTOR(17 downto 0);
	SRAM_CE_N: OUT STD_LOGIC;
	SRAM_OE_N: OUT STD_LOGIC;
	SRAM_WE_N: OUT STD_LOGIC;

	SRAM_LB_N: OUT STD_LOGIC;
	SRAM_UB_N: OUT STD_LOGIC;
	
	SRAM_DQ: INOUT STD_LOGIC_VECTOR(15 downto 0);
	
	-- Provide data to system
	DOUT : OUT STD_LOGIC_VECTOR(15 downto 0);
	complete : out std_logic
);

END sram;

-- first cycle, capture inputs
-- second cycle, sram access
ARCHITECTURE slow OF sram IS
	signal oe_n_next : std_logic;
	signal oe_n_reg : std_logic;
	
	signal we_n_next : std_logic;
	signal we_n_reg : std_logic;	
	
	signal data_next : std_logic_vector(15 downto 0);
	signal data_reg : std_logic_vector(15 downto 0);
	
	signal request_next : std_logic;
	signal request_reg : std_logic;
	
	signal low_byte : std_logic_vector(7 downto 0);
BEGIN
	-- registers
	process(clk,reset_n)
	begin
		if (reset_n = '0') then
			oe_n_reg <= '1';
			we_n_reg <= '1';
			data_reg <= (others=>'0');
			request_reg <= '0';
		elsif (clk'event and clk='1') then
			oe_n_reg <= oe_n_next;
			we_n_reg <= we_n_next;
			data_reg <= data_next;
			request_reg <= request_next;
		end if;
	end process;

	-- next state
	process(din,wren,request,request_reg,width_16bit)
	begin		
		data_next <= din;
		request_next <= '0';
		
		oe_n_next <= '0';
		we_n_next <= '1';
		
		if (width_16bit = '0') then
			data_next <= din(7 downto 0)&din(7 downto 0);
		end if;
		
		if (request = '1') then
			-- on second cycle do write - address/data stable by now guaranteed (normal timequest...)
			oe_n_next <= wren;
			we_n_next <= not(wren);		
			request_next <= '1';
		end if;
	end process;
	
	LOW_BYTE <= SRAM_DQ(7 downto 0) when address(0)='0' else SRAM_DQ(15 downto ;

	-- output
	SRAM_ADDR <= address(18 downto 1);
	SRAM_CE_N <= '0';
	SRAM_OE_N <= oe_n_reg;
	SRAM_WE_N <= we_n_reg;
	SRAM_LB_N <= not(width_16bit) and address(0);
	SRAM_UB_N <= not(width_16bit) and NOT(address(0));
	SRAM_DQ <= data_reg when we_n_reg = '0' else (others=>'Z');

	DOUT <= SRAM_DQ(15 downto &LOW_BYTE;
			
	complete <= request_reg;		
		
	--GPIO <= (others=>'0');
END slow;
If anyone has example timequest config for sram then that would be great:-) Its config doesn't seem anything like what the datasheets specify... Edited by foft
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The latest builds (20140102 & 20140103) seem to have broken something on my newer DE1 board. The last version to run reliably for me is 20131229 (20131231 runs, but I can't load anything off of the SD card). Have you changed the timing on the flash loader? The newer board use slower parts (90 vs. 70ns).

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It's just zpu code that is meant to have changed... Though I'm making a start at porting it to other boards, including Xilinx. So I switched from the BDF schematic to vhdl at the top level. I expect I broke sdram in the process.

 

Please PM me your email.

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I just ordered two MKII Amiga/Atari ST/TT/Falcon PS/2 Mouse Adapters from eBay. One for Atari ST mouse and other Amiga mouse.

 

http://www.ebay.com/itm/111240568684

 

I want to try a few A8 programs that require a mouse like the New 8bit GUI that Flashjazzcat is working on.

http://www.atari8.co.uk/gui/

 

Anyone with a mouse try it yet on the DE1? I've been able to load both versions but without a mouse I can't move the pointer.

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NLM32: I tried a PS/2 mouse with my Minimig adapter (wich includes PS/2 mouse connection) and it doesn't work with that GUI. Should it be working?

 

foft: for now, I'm burning the DE1 in a vicious, compulsive series or Dropzone games, then :P

 

 

 

I tried my Minimig adapter also and the PS2 Mouse didn't work either. I don't know if foft has the PS2 port configured for the Minimig adapter. I also think 8bit GUI and other programs that use a mouse is looking for a mouse connected to a joystick port.

@foft: ??

Edited by NML32
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NLM32, have you tried "Alternate Reality: The City"? Just for watching the awesome intro, even if we can't save a game for now, would be great :)

It won't load here, no matter if I press F4 of not,

 

Yes, I just updated the spreadsheet. I was able to load disk 1 and watch intro.

Edited by NML32
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Two pokeys, main one left channel, other one right channel. Real Atari is mono. At some point I had both Pokey's at same address but that was a while ago...

 

No plans for Minimig ps/2 (when we have osd could be an option) but a real mouse should work. Remember though DE1 is not 5V tolerant. I use IDT Quickswitches...

Edited by foft
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@foft

Loading from SD is working very well using the latest build (experiment_20140103.sof). Currently out of 50 games Vanfanel and I tried only one had a issue. :) :thumbsup:

Caverns of Mars - Can't control the ship with Joystick or KB, works in Alterria 2.40 emulator so I guess the atr is OK.

 

http://goo.gl/9atQYR

 

@foft - Once again a big Thank You for all the hard work you're putting into this project!!

Edited by NML32
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@foft

Loading from SD is working very well using the latest build (experiment_20140103.sof)[/size]. Currently out of 50 games Vanfanel and I tried only one had a issue. :) :thumbsup:

Caverns of Mars - Can't control the ship with Joystick or KB, works in Alterria 2.40 emulator so I guess the atr is OK.

 

http://goo.gl/9atQYR

 

@foft - Once again a big Thank You for all the hard work you're putting into this project!!

I subscribe everything Mr NML32 has said here. This is an awesome project and it has come to a point where I feel I have a real Atari 800 computer again.

Thanks for this incredible work!

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Thanks for the feedback:)

 

Regarding Caverns of Mars. Avery explains the issue with this title in his fantastic hardware reference manual. Should be an easy fix. Speaking of which... if either of you have time would be good to add the following to the spreadsheet:

I) Any titles explicitly mentioned in the Altirra Hardware reference manual

ii) Tricky titles listed earlier in this thread.

 

Next up... OSD and port to SOCkit, Replay and MCC216. Oh and Carts.

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