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IDE card tentative commitment page


marc.hull

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I have a question that I hope will not detract from the topic at hand but I never really thought about it before.

 

Does an ide card or scsi card or any hard drive controller for that matter act as a bootable drive by any traditional sense of the word.

 

Or does the ti simply boot normal and the hard drives/cf act as large fast storage only? Like a super floppy?

Edited by Sinphaltimus
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The answer to your question is: it depends. If you have your hard disk set up with disk 1 emulation on it, your system will go there first and boot from the hard disk. If you don't have that option setup on your system, it is treated like a monstrously large floppy with directories and subdirectories.

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Just had a conversation with insane multitasker this evening in which we spoke about how easy it is to corrupt the IDE DSR residing in the 512k memory. It came to mind that there was a mod that could be done to the WHT Horizon RAM Disks to deal with the problem of corrupting the 32k ROS memory chip when assembly programmers go around peeking and poking. What the mod did was put a switch in the circuit for the write line to the 32k so that once a ROS was loaded and the switch then opened that line wayward peeks and pokes couldn't corrupt the ROS. Perhaps there is still time to add such a feature to the new through hole design that does the same thing to the 512k that holds the DSR for the IDE controller. Just a thought, I haven't actually checked the circuitry of the IDE controller to know if a switch could be added without affecting normal operation.

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I'll have to read through the operations guide to the card to be sure, but I have a sneaking suspicion he's using the extra RAM on that chip as a buffer of some kind (which is probably also why he recommends the 512K variants over the 128K ones)

 

Yes, insane multitasker has reminded me that Fred does use the space in the 512k for buffers so this mod is no good for the IDE DSR write switch. Oh well, it's never easy with the TI/Geneve. lol

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I wonder if there would be an easy way to incorporate NVRAM or an EPROM onto the board, with the idea that the DSR is first loaded (or reloaded) from this extra chip each time a pristine copy is needed. The powerup sequence could be forced to run from the EPROM (by making the EPROM the default powerup chip) which would then copy its contents to the RAM chip, and flip-flop back to RAM for internal operation. Upgrading the DSR would require updating the EPROM unless the user ran in RAM-only mode.

 

We used a similar method @ Cecure when developing some Geneve routines and it saved a lot of headache during development.

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Wow, this would be great.

And a "Press <FCTN-DEL> to enter setup" please please please :)

 

--

 

And maybe pressing "space" for not running LOAD, if present..

Edit: ah no, it just uploads/copies the DSR and swaps to the business-as-usual floppy-LOAD, right ?

 

--

 

You want to replace the manual load of the IDEDSR from disk, each time you power on, right ?

Where is this uploaded today, into the 32KB and/or the internal RAM ?

Or is there anything "volatile" on the IDE-card where something is loaded up, too ?

Edited by schmitzi
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Wow, this would be great.

And a "Press <FCTN-DEL> to enter setup" please please please :)

 

--

 

And maybe pressing "space" for not running LOAD, if present..

Edit: ah no, it just uploads/copies the DSR and swaps to the business-as-usual floppy-LOAD, right ?

 

--

 

You want to replace the manual load of the IDEDSR from disk, each time you power on, right ?

Where is this uploaded today, into the 32KB and/or the internal RAM ?

Or is there anything "volatile" on the IDE-card where something is loaded up, too ?

I am not actively working on what I posted, it is more a question for future redesign/enhancement for when Ksarul performs his magic on the thru-hole style card.

 

You should pose the question to Fred about DSK1. On the Geneve, this is controlled with a command I added to MDOS; since the IDE DSR lives in RAM, I would think Fred could store some configuration options if he so desired, such as turning on/off DSK1 emulation.

 

As for the reloading of the DSR, I agree with Ksarul, you probably have a dead battery in your clock/ram chip setup.

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hmm, I found an IDE7.ZIP, but don´t know how to make a DSK from the files inside....

 

I will create a DSK image for you when I get home tomorrow and send it your way.

Alternatively, you can use Fred Kaal's TIDIR. Create a blank DSSD disk and copy all the files from the zip to the image. Easy as pie :) Then you can transfer that image to a real disk using HDX and the DSK2PC utility again from Fred. He's like the Swiss Army knife of utilities :grin:

 

BTW, Thierry's DSR partitions the IDE drive into separate floppy disk drives, # 4 to B, but you can store hundreds of disk images on the IDE drive and swap them as needed. Fred's DSR is more like a traditional hard drive.

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great, thanks.

I know TI99DIR, but I think I just was confused by the filenames inside the ZIP.

I saw that file-extensions were present, but if you tell me to do so, so I think they have TIFILES-filenames too, right?

 

Or is it the IDEAL.ZIP ? There is a TXT inside, talking about IDEDSR, but the versionnumbers seem to be too high

 

xXx

 

 

Edit: No, they have no TIFILE-names in IDE.ZIP or IDE7.ZIP Only the IDEAL.ZIP has DSKs inside.

 

I´ll wait, but there is absolutely no(!) hurry, as it just is for tinkering, alone in the dark :)

Edited by schmitzi
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great, thanks.

I know TI99DIR, but I think I just was confused by the filenames inside the ZIP.

I saw that file-extensions were present, but if you tell me to do so, so I think they have TIFILES-filenames too, right?

 

Or is it the IDEAL.ZIP ? There is a TXT inside, talking about IDEDSR, but the versionnumbers seem to be too high

 

xXx

 

 

Edit: No, they have no TIFILE-names in IDE.ZIP or IDE7.ZIP Only the IDEAL.ZIP has DSKs inside.

 

I´ll wait, but there is absolutely no(!) hurry, as it just is for tinkering, alone in the dark :)

 

Here you go :)

IDEAL.dsk

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  • 2 months later...

Just had a conversation with insane multitasker this evening in which we spoke about how easy it is to corrupt the IDE DSR residing in the 512k memory. It came to mind that there was a mod that could be done to the WHT Horizon RAM Disks to deal with the problem of corrupting the 32k ROS memory chip when assembly programmers go around peeking and poking. What the mod did was put a switch in the circuit for the write line to the 32k so that once a ROS was loaded and the switch then opened that line wayward peeks and pokes couldn't corrupt the ROS. Perhaps there is still time to add such a feature to the new through hole design that does the same thing to the 512k that holds the DSR for the IDE controller. Just a thought, I haven't actually checked the circuitry of the IDE controller to know if a switch could be added without affecting normal operation.

 

The IDE card has a write protect CRU bit. Unfortunetly when this bit is off the RAM of the DSR is in R/W mode, when this bit is on the RAM is write protected.

Every time the IDE DSR returns to the console the write protect bit is switched on to write protect the RAM. The first time this is done is when the power up

routine of the IDE DSR is executed.

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I'll have to read through the operations guide to the card to be sure, but I have a sneaking suspicion he's using the extra RAM on that chip as a buffer of some kind (which is probably also why he recommends the 512K variants over the 128K ones)

 

The IDE DSR uses the lower 4KB as a fixed memory area. Here resides all the handy code that is used to read/write the IDE device and can

be used by any other level 2 or level 3 function of the DSR.

 

All pages are in the upper 4KB. The IDE DSR can have a maximum of four open files, these are in page 11, 12, 13 and 14. These pages contain

exactly the same code AND buffers that holds the Directory data record (DDR), File descriptor index record (FDIR), File descriptor record (FDR)

and a sector buffer of 512 + 10 bytes. The DDR, FDIR and FDR are all 256 + 10 bytes lang. The DSR doesn't use RAM of the RTC chip.

 

(and now i'm reading your message again I don't know for sure if you are talking about IDEAL or the IDE DSR ;-) )

Edited by F.G. Kaal
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I'm still plugging away at this layout between all of the other projects I've been working on. . .and @Fred, it is very good to know how you are using the RAM--but my curiosity was also turned towards the reason Thierry suggested the larger RAM chip, something I'm still not fully clear on. I did get a few of the RTC chips for the boards though, as not too many sources have compatible chips lately. . .

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