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applekevin

65816/65C02 Question

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So, apart from the fact that the the A8 bus is designed around a 1.79mhz processor, as I understand it, the main difficulty in making a an accelerator for the Atari is the incompatbility between the 6502C/SALLY (not to be confused with the 65C02) and the 65C02 and 65816, which lack support for the illegal opcodes present on NMOS 6502s. It's my understanding that this is roughly analogous to the problem in the Apple II world with the Apple IIc, where the IIc's 65C02 can cause a lot of incompatibility problems.

 

Basically, I had three ideas and was wondering whether these would work.

  1. Would it be possible to write a program to patch 'dirty' software which utilizes illegal opcodes to work with "clean" implementations? Furthermore, would it be possible to use some sort of static recompilation to take advantage of the extended instruction set of the 65C02, to make up for potential performance loss due to the loss of the illegal opcodes, or to improve already working software?
  2. For the Coldfire, there is some software called CK68klib. Basically, the Coldfire is a stripped down version of the 68k. Most CF code is compatible with 68k processors, but not the other way around, since the CF instruction set (I think) is basically a subset of the 68k instruction set. What CK68klib does is basically 'trap' opcodes that don't exist on the CF and convert them to work with it on the fly. Obviously, there is a some performance penalty, but a CF v4 can actually outperform true 68k processors, even with this. Would such a thing be possible for the 65816?
  3. Lastly, if a software option isn't possible, or at least wouldn't be at all practical (obviously since bother are turing machines, it is theoretically "possible," in the same way emulating a PS3 on the A8 is "technically possible" but pointless!) could some sort of CPLD or FPGA be used to decode illegal opcodes into legal ones on the fly?

Thanks for reading! Sorry if my questions are dumb or don't make sense!

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Most offending software could be patched, unless it's using illegal opcodes for performance reasons (demos and such).

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Academic questions of course.

1) http://laughtonelectronics.com/arcana/Kimklone_intro.html As you can see from his web site, you can add any instructions and functionality you want to a 6502 system by intercepting the code. Same option should be possible on any processor. Of course if you can add them, you can disable them when necessary.

 

2) Not sure what you are getting at, but a 65816 *IS* a 6502 when you first turn it on. You have to instruct it to become a 65816 in software. This is pretty much the same thing Intel did with the 8088/6 me thinks. When your IBM style system come up, it isn't in Pentium mode but 8088. This could have changed somewhere along the line, haven't been hacking Intel platform in decades.

 

3) Given Jeff Laughton's approach, I see no reason why it couldn't be implemented in a CPLD.

 

He mentioned a few odd things about the KIM that I didn't notice in my first few reads. Still not sure if I read correctly. :) The KIM had a PIA on page zero. Since that is a high traffic area to use for various forms of indirect addressing, using a PIA mapped into 4 bytes of page zero should make one heck of pseudo linear address machine. All the increment, decrement, test, and indirect addressing should work. Lots of constraints like you couldn't let an interrupt happen<because they would jump to OS ROM which would be mapped out of memory during extended memory access> but almost worth the pain. Maybe use one of the PIA ports in read/data mode while using the CPU's address lines combined with the other PIA port. I have to sleep on this, for a couple of weeks! Not quite right yet.

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Hello applekevin,

 

Not so really important as such, but you've stated someting basically wrong in the first line of your post.

" The A8 bus is not designed around a 1,79Mhz processor " (If you mean the 6502C by this.)

Because of the video-chips and the NTSC-system, the clock just happens to be at this speed.

And for PAL it's a little different. So it's basically the video system that sets the processor pace.

With a modern LCD display, the speed could be increased.

 

Also, the illegal op-codes are not a problem as such.

It's the (few) programs that rely on these codes that are the problem.

 

Both things appear to be a bit like the chicken and the egg (What came first)

Yet the order is more clear in the computer cases.

 

In my opinion, the way around this is to have the original processor available as well.

If need be, switch back to the original processor. And that doesn't need to happen on the fly.

But it would be feasable to develop a " softcore " or virtual processor that can be switched much like the 65C816.

 

BR/

Guus

Edited by guus.assmann

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Ricortes,

 

Thank you for that link! That was exactly the sort of thing I was referring to.

 

Also, I know that the 65816 boot up in emulation mode. What I meant was that I was wondering if it was possible to trap illegal ops that were useful in software.

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The 65816 and 65C02 don't have an illegal instruction trap like the Hitachi 64180/Zilog Z180 and 6309.

You couldn't trap illegal instructions that have been replaced by new instructions anyway since the new instructions are still active in emulation mode.

I didn't think it was a huge issue on the Apple II series because there was a small number of titles impacted by it.

I think many have since been patched so they will run on the IIgs anyway though.

 

You could create a 65816 that disables new instructions and traps illegal ones in emulation mode but I haven't seen a full 65816 core in VHDL or Verilog to modify yet. Adding an emulation mode to a 65C02 core might require a bit of work. Even if you do add an instruction trap you have to put a trap handler somewhere, add a trap vector somewhere and it takes additional clock cycles... which is likely to interfere with something and you aren't going to gain full compatibility anyway.

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Your best bet is to probably just have the old 6502C on the board along with the 65816 and have a switch for which one is used. You'd normally use the 65816, but when you wanted to play an old game that uses the illegal ops, you'd switch to the original processor.

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So, apart from the fact that the the A8 bus is designed around a 1.79mhz processor, as I understand it, the main difficulty in making a an accelerator for the Atari is the incompatbility between the 6502C/SALLY (not to be confused with the 65C02) and the 65C02 and 65816, which lack support for the illegal opcodes present on NMOS 6502s.

Is it? I mean, if your program uses illegal opcodes, it's the problem of the program and not of the chip. If the program fails, it's probably for the better of the user to get rid of a piece of software from a careless developper who did not know to program by the standards.

 

Would it be possible to write a program to patch 'dirty' software which utilizes illegal opcodes to work with "clean" implementations? Furthermore, would it be possible to use some sort of static recompilation to take advantage of the extended instruction set of the 65C02, to make up for potential performance loss due to the loss of the illegal opcodes, or to improve already working software?

No, not in a stable way. For that, you would need to understand the full program and find bytes that are really executed as instructions and are not program data. If there is such a difference anyhow, think of self-modifying code. It's a job to be done by hand, better with the source code being available. Better even, slap the developper. From the stable software and games, I've rarely seen anything that depends on illegal opcodes. A couple of copy protection schemes depended on them IIRC.

 

 

 

For the Coldfire, there is some software called CK68klib. Basically, the Coldfire is a stripped down version of the 68k. Most CF code is compatible with 68k processors, but not the other way around, since the CF instruction set (I think) is basically a subset of the 68k instruction set. What CK68klib does is basically 'trap' opcodes that don't exist on the CF and convert them to work with it on the fly. Obviously, there is a some performance penalty, but a CF v4 can actually outperform true 68k processors, even with this. Would such a thing be possible for the 65816?

No. The reason why that works (also for the 68040 and 68060, btw, to implement the there missing transcental math functions and some other stuff) is that the 680x0 has special traps its executes when it hits an opcode that it is "supposed to know" but does not. In such a case, the motorola fpsp/isp software package traps in and executes the code in software. Not possible for the 65816 since it does not have traps for the "illegal opcodes" of the 6502. Instead, it uses them for its own instructions that do something different. (That said, I've written 68040/68060 libraries for the Amiga, thus I know the game...)

 

 

 

Lastly, if a software option isn't possible, or at least wouldn't be at all practical (obviously since bother are turing machines, it is theoretically "possible," in the same way emulating a PS3 on the A8 is "technically possible" but pointless!) could some sort of CPLD or FPGA be used to decode illegal opcodes into legal ones on the fly?

It would probably be easier and more "canonical" to have an FPGA implementation of the 6502 available right away that includes an instruction to switch between instruction sets, instead of having an add-on chip to do that.

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I have an Atari 800 with a cpu card - isn't this just a standard 6502 CPU? Can't i switch the chip out with a 14MHz 65C02?

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Hello fibrewire,

 

Yes it's a standard 6502 and can be changed with a 65C02 (or a 65C816 when a few pins are changed)

It will give the advantage of more instructions.

But the higher clock speed will not go. Only if you don't need any display.

And at a little higher speed, the memory will not work anymore. Nor will the rest of the chips on the bus.....

 

BR/

Guus

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I have an Atari 800 with a cpu card - isn't this just a standard 6502 CPU? Can't i switch the chip out with a 14MHz 65C02?

 

Check to make sure you have the right version of personality/cpu board. If the processor is a 6502B, then you can plug in a 65C02 w/o any problems.

 

As you probably guessed, it will run at same speed as the original Atari. The 65C02 is an OK swap even at the same speed since it uses less power, adds a few instructions, has some potential. The new instructions maybe let you write ~5% tighter code.

 

The problem with a faster system is the rest of the chips in an Atari just can't cut it and it throws the timing off for everything. Music pitch is off, you lose snyc with the monitor, and SIO timing is off. Max I ever got a system to run was 2.12 MHz and that's not really worth doing.

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Hello fibrewire,

 

Yes it's a standard 6502 and can be changed with a 65C02 (or a 65C816 when a few pins are changed)

It will give the advantage of more instructions.

But the higher clock speed will not go. Only if you don't need any display.

And at a little higher speed, the memory will not work anymore. Nor will the rest of the chips on the bus.....

 

BR/

Guus

I wonder if I can slap a 14Mhz 65c02 in my 800 and display with a Bit3 80 column card. Only one way to find out!

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I ran a 65C02 on my A400 for a few months, but some programs failed due to their use of illegal opcodes, so I switched back to the original 6502. At the time, I had been interested in trying to use the new bit instructions on the 65C02 for display purposes.

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