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ralphb

xdt99: New TI 99 cross-development tools available

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In doubt, you can, of course, take the time. (I actually did that often to verify my results in MAME; with the Geneve this is even more comfortable with its real-time clock.) Build a nested loop that takes some seconds (e.g. a full inner loop (65536) and e.g. 20 iterations in an outer loop) with the command to be tested in the body, and the same loop without a command.

 

As for your shift question, I'd guess we have cycles 1, 2, 3, 4, 9, then C, and the two following them.

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42 minutes ago, mizapf said:

take the time [...] As for your shift question, I'd guess we have cycles 1, 2, 3, 4, 9, then C, and the two following them.

Timing is a good (but time consuming) idea.  I'll do that.

 

For the cycles, if "9" and "9 + C" were different cycles, and say C=1, then the cycle for actually shifting the register would be missing.  So either the presentation is weird, or "9 + C" should read "10 + C", like in the other examples (see B, for example).

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I seem to remember having a discussion about clock cycles on the TI 99 before, but for the life of me I just cannot find it.  So please don't mind me asking again ...

 

How long is a "cycle" on the TI 99 to begin with?  Is it one "phi" or four "phis"?  For a 3 MHz clock, that'd be 1/3 us or 4/3 us, resp.?  4/3 us seems awfully long, as a typical multiplexed read cycles takes 2 us.

 

And do the 4 wait states for memory accesses already include the cost of the multiplexer?

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One cycle is 333 ns (see the "TI-99/4A console and peripheral expansion system technical data", p. 15 (Figure C)).

 

The 4 wait states are created by the multiplexer circuitry. See the same figure, you have two memory operations, one with A15=1 and one with A15=0. After the six cycles, the memory access is complete.

 

 

 

 

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OK, thanks!  So it's one "phi" and the wait states are the multiplexer.  🙂

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I've just finished timing LDCR, STCR, and the shift operations.  For STCR, it turns out that the datasheet is correct but the data manual isn't: There are four cases: <8, 8, >8 and <16, and 16.  The data manual only lists 2 cases.

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That means that for the cases 8 and 16 where no shift operations are needed, one cycle is used. Or, in other words: The minimum cycle count is 1 (maybe to find out that there is no shift).

 

C=8 v C=16: C'=1

C<8: C'=8-C

C>8: C'=16-C

 

I'll have to check how I did it in MAME. It's already 10 years ago that I re-implemented the CPU, so I really don't remember.

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13 minutes ago, mizapf said:

C=8 v C=16: C'=1

C<8: C'=8-C

C>8: C'=16-C

Yes, exactly.  Which also means the formulas in the Data Manual are garbled.

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I've released a new version of xdt99 with improvements to all tools, but focusing mostly on xas99 and xga99.

 

The new features are a relaxed syntax for xas99 and xga99 allowing arbitrary spaces in and between operands, a much improved cycle counter for xas99 with support for user-provided fine-tuning, pragmas for xas99 that influence assembly, warning categories for xas99 and the ability to suppress individual categories, and unused symbols for xga99.  Additionally, all tools now support color and offer a new environment variable to store default options for each tool.

 

To learn about these new features (and any future features), I've created a new file MANUAL.diff showing just the additions to the manual.  This way, an experienced user does not have to re-read the manual again and again.

 

The cycle counter should be very accurate and account for addresses and workspace.  Additionally, pragmas may provide hints for unknown target addresses such as *R1 or @>20(R2).

 

The relaxed syntax, activated with -r, makes no assumptions about spaces, but requires that all comments (except for * comments) be preceded by semicolon (;).

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