DIY 128k/512k cartridge - PCB, files and build instructions

[electrotrains]

Dear All,

After building a homebrew SIO2SD, I decided it would also be nice to have a multi-cartridge. I was also quite keen to see what SDX was all about, since its mentioned so much on the forum - so I wanted to build a cartridge that would support that.
I looked at the Atarimax cartridges, but the price seemed a little bit steep and I really wanted another DIY project anyway.
The SIC!Cart looked promising, since the design and PCB layout are freely available, but the use of a GAL put me off, since it meant I would need to also buy a GAL programmer and I really wanted to use current rather than obsolete parts.

In the end I decided to have a go at making something myself, largely with the aim of learning a bit more electronics.
I'm posting the design here, in case anybody fancies making one themselves - or if you are looking for a cheap way to make big cartridges for a new game. You can consider the design open source - feel free to improve.

Introduction
This is a design for a low-cost 128k or 512k cartridge, and it is designed to fit in a grey XL/XE style cartridge case.
It uses standard 5v 32 pin flash EEPROMs. The cartridge is read-only - you need some way of programming the EEPROM (see below).
Bank switching is carried out by a Xilinx CPLD. I've posted the files to support either the Atarimax 1mbit or 8mbit banking schemes. You'll also need a way to program the CPLD (see below).

This isn't a project for everyone - you'll need to be happy soldering and have a bit of electronics knowledge.
You'll probably also need at least an arduino.

Parts list

- 1mbit (128k) or 4mbit (512k) 32 pin Flash EEPROM e.g. SST39SF010, SST39SF040 (£1.50)
- 32 pin DIP socket for the above (£0.25)
- Xilinx XC9536XL (PLCC44) (£1.50)
- PLCC44 socket for above (£0.70)
- LP2950-33 LPE (or other 5v->3.3v regulator in TO-92 package) (£0.15)
- 2 x 10uF electrolytic capacitor (£0.20)
- 0.1uF ceramic capacitor (£0.10)
- PCB (approx £20 for 10). Eagle files attached. I've used dirtypcbs (and oshpark for a earler revision).

Total cost roughly £7

Programming the EEPROM

I've tested both 128k and 512k flash EEPROMs. I don't have an EEPROM programmer, but I do have an arduino, and there's some code on the arduino forum for programming SST39SF010/040 chips, so I went with these.
If you use a 128k chip then you can program it with a 1mbit atarimax image (use the 1mbit banking scheme on the CPLD).
If you use a 512k chip then you can program it with half of a 8mbit atarimax image (use the 8mbit banking scheme on the CPLD).

Programming the CPLD

The design uses an XC9536XL PLCC44 CPLD. You'll need some way of programming this with the desired banking scheme.
I use a bus-pirate to download the xsvf file to the device, using a homemade programming adapter.
http://dangerousprototypes.com/docs/Bus_Pirate_JTAG_XSVF_player

https://www.coolcomponents.co.uk/bus-pirate-v3-6-universal-serial-interface.html

 

The programming adapter is nothing more than a PLCC44 socket on some protoboard, with +3.3V, GND, TDI, TDO, TMS and TCK from the bus pirate wired to the appropriate pins of the socket. I found I didn't need any capacitors.

I believe its also possible to program these CPLDs with xsvf files using an arduino or raspberry pi - but I haven't tried. You'll still need to build some kind of adaptor using a PLCC44 socket.

You don't need to use the atarimax banking scheme - I used it since it was easy to make images for testing, and SDX was available as a 1mbit atarimax image.

Attached Files

I've attached the eagle project (board and schematic).
Also attached are the xsvf files for 1mbit and 8mbit banking schemes, and the corresponding VHDL+pin allocation files.

Spares & Kits

This is just a hobby project, but I've got 8 PCBs left-over if anybody is interested...

 

PCB only - £4 (+postage)

 

Note that the PCB does not have "hard gold" fingers on the edge connector - so it won't last forever. Having said that, I've tested with 30+ inserts and removals and no serious signs of wear. But if anybody knows a PCB manufacturer that can do proper gold fingers cheaply I would be very interested for future projects...

I realise that programming the CPLD is the main hurdle to making one of these, so I can maybe offer those, or complete assembled boards if a few people are interested - since I'll have to order more CPLDs...

 

PCB + Programmed CPLD - £8 (+postage)

 

Assembled without case (with 128k eeprom, programmed CPLD) - £14 (+postage)
Assembled without case (with 512k eeprom, programmed CPLD) - £15 (+postage)

PM if interested.

Atari 4mbit Cart Eagle.zip

schematic.pdf

xsvf files.zip

Edited May 19, 2015 by electrotrains

[+Stephen]

Awesome work!

[flashjazzcat]

That looks really good. Programming the Xilinx would have been made easier had there been a JTAG header right on the cartridge PCB, but as you say the programmers are pretty easy to knock up.

[electrotrains]

That looks really good. Programming the Xilinx would have been made easier had there been a JTAG header right on the cartridge PCB, but as you say the programmers are pretty easy to knock up.

 

Agreed - that would have been a good idea.

[Shawn Jefferson]

Can you flash/write from the Atari side as with the Atarimax carts? (I think the answer is no...)

[GoodByteXL]

Can you flash/write from the Atari side as with the Atarimax carts? (I think the answer is no...)

 

Can you flash/write from the Atari side as with the Atarimax carts? (I think the answer is no...)

Or on a more easier and cheaper way as with e.g. the SDX128 EEPROM cart. All parts are easy to handle and besides some patient soldering it gets "programmed" from the A8 side. The cart on the attached image is in use here since March 2009. No GAL programmer or another programming tool needs to be baught.

Nevertheless this project is another great proof that A8 users are really inventive :-).

[+Larry]

Can you flash/write from the Atari side as with the Atarimax carts? (I think the answer is no...)

 

Am I misinterpreting this? (Or is he saying that you can just take the image and use a programmer?)

 

"Programming the EEPROM

 

I've tested both 128k and 512k flash EEPROMs. I don't have an EEPROM programmer, but I do have an arduino, and there's some code on the arduino forum for programming SST39SF010/040 chips, so I went with these.

If you use a 128k chip then you can program it with a 1mbit atarimax image (use the 1mbit banking scheme on the CPLD).

If you use a 512k chip then you can program it with half of a 8mbit atarimax image (use the 8mbit banking scheme on the CPLD)."

 

Or -- could we use the Atarimax USB Programmer/Studio?

 

-Larry

[electrotrains]

Larry,

 

Sorry if this wasn't clear.

 

The cartridge needs a programmed EEPROM. It doesn't allow writing from the Atari, nor from the maxflash USB programmer.

 

How you program the EEPROM is up to you (and might depend on the manufacturer of the EEPROM you use).

 

You could use a Willem programmer or equivalent that supports the EEPROM you want to use. I don't have one, so I just used an arduino, since there was some arduino code already written to program the SST EEPROMs I've got. Basically a python script on the PC reading from a file and passing to the arduino via USB/serial which erases then programs the chip. I'm happy to provide the code if anybody wants it.

 

As far as the image you program on the chip goes, it can be any atarimax cartridge image (assuming you've programmed the CPLD with the atarimax banking scheme). That means you can export an image from Maxflash Cartridge Studio and then write the BIN file to the EEPROM - this is what I've been doing for my own use and testing.

 

This cartridge wasn't intented as a general purpose easy to use multicart - I built it mainly for my own amusement, initially to try SDX and flashjazzcat's GUI.

 

However, it might be of interest to programmers wanting a cheap way to distribute their software on cartridge, or to people like myself dabbling in electronics who wanted to try making a multi-cartridge.

 

Robin

[Joe Stella]

Cool! Thank you!

[+Larry]

Ah... Thanks, that's very clear! Nice project, BTW.

 

Hope you can find a source for pcb's with gold contacts.

 

-Larry

[peteym5]

How hard would it be to reprogram it for XEGS bank switching. My big games can assembled to use XEGS or Max/Williams bank switching schemes. We are interested in your board. We have have shells and an EPROM burner.

Edited May 20, 2015 by peteym5

[electrotrains]

peteym5,

 

If you have a look at the schematic, I've only run A0-A7, CCTL, and PHI2 as inputs to the CPLD, so that rules out the XEGS banking scheme which I think uses D0-D7.

 

The Max/Williams scheme appears to be very similiar to the atarimax 128k one, so should be perfectly do-able.

 

I'm not planning to produce these commercially - the design is free for all to use and modify. Getting the PCBs produced is as simple as uploading the brd file to e.g. dirtypcbs and waiting for a couple of weeks for them to arrive!

 

Regards,

 

Robin

[flashjazzcat]

So to enable in-place flashing would require what: just hooking up write enable to GND?

Edited May 20, 2015 by flashjazzcat

[Joey Z]

So to enable in-place flashing would require what: just hooking up write enable to GND?

Not quite, but maybe. It depends on a few factors. First off, the we pin isn't a write protect. Under normal circumstances, the WE pin is pulsed low when a write is made. Flash chips are different though, and have to be erased on a sector or chip basis (depending on design). Then you write them on a per sector or whole chip basis. this is usually accomplished with a series of magic writes at certain addresses and with certain values, followed by the data. The chip also usually has an output enable as well, which is used to enable the i/o pins as outputs for reading. If you assert both of them, then you have to consult the datasheet. Some chips define that as a write, some as a read, some don't define it. If the first is the case, then grounding WE would prevent the chip from reading. If the second were the case, then that would actually work fine, as long as the state of the atari's r/w pin controls the state of the OE pin. And if the latter is the case, then you'd have to actually connect the WE pin somewhere.

 

EDIT: since the r/w pin is not connected, there are a couple ways you might be able to do this.

 

If the combination of WE and OE asserted is interpreted as write, you might be able to get away with grounding OE and connecting WE to R/W.

 

If the combination of WE and OE asserted is interpreted as read, you might be able to get away with tying WE low and inverting R/W and then using that signal to control OE.

 

For any of the cases, if you connect WE to R/W and invert R/W and connect that to OE, that should work too. Also if WE and OE both asserted is an undefined state, then you would have to use this one.

Edited May 22, 2015 by Joey Z

[flashjazzcat]

Yeah: I know about the JEDEC programming methods, but I wasn't sure about the signal side. I tried to enable flashing on my modified 128KB SDX cart using jumpers but it didn't work for reasons which now become apparent. Thanks for the info.

[Madhatter]

Very good job, I 'm trying to build.
The schematic is incomplete , missing the pins that go to the CPLD , there are 13 pins unidentified. Could you show complete schematic circuit?

 

Eric

[electrotrains]

Very good job, I 'm trying to build.

The schematic is incomplete , missing the pins that go to the CPLD , there are 13 pins unidentified. Could you show complete schematic circuit?

 

Eric

 

Eric, the schematic is complete - these CPLD pins are simply not connected - i.e. I didn't need them.

You'll see this on the eagle board file too.

 

Robin

[Madhatter]

Please tell me what address lines are marked as "?".

[electrotrains]

Eric,

 

If you open the board and schematic in eagle, you'll find all the wires are labelled (use the get info tool on the wires).

 

Sorry - I hadn't bothered to add explicit labels to the nets, which means that they don't appear on a printed schematic. Still getting the hang of eagle, I find it somewhat unintuitive at times.

 

Robin

[Madhatter]

Ok, thanks.

[Madhatter]

Do you have the .jed file to program the CPLD?

[electrotrains]

Eric,

 

Its been a while since I worked on the project (so I can't remember the whole process) but I used the xsvf files to program the cpld. Do you want to use some other programming method that requires JED files?

 

Either way, you should be able to build whatever programming files you need by rebuilding the project in ISE. I included the VDHL source code and pin allocations in the zip file in the first post which should be enough recreate the project so you can generate programming files.

 

Robin

[santosp]

That looks really good. Programming the Xilinx would have been made easier had there been a JTAG header right on the cartridge PCB, but as you say the programmers are pretty easy to knock up.

 

A revised version with minor improvements and a JTAG header.

 

Atari 4mbit Cart.rar

Edited August 20, 2016 by santosp

[Madhatter]

I built the cartridge.

It works!

http://spaceinvader.comuf.com/Multicartridge_Atari_con_CPLD.htm

Thanks for sharing.

[peteym5]

Deleted. Seeing it was already answered.

Edited April 26, 2017 by peteym5