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New HARD & Desire demo


Heaven/TQA

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Beginning of the year I finally got in contact with main coders of HARD. Yes. the guys who coded Veronica and Joyride demo.
I received complete source what they could find from their productions and code snippets of the Joyride successor which was never released called "Dressed for Success".
So I spend times to get the old native assembler source into modern world (ATMAS2 source code plus Atari Macro assembler format ;=)) and so the idea of Nordlicht release appeared... It was tend to be released at the Grave digger compo but I added bits and pieces and so I tried to make a full release...
Coming from Arsantica series it was my first try since 1996 to code a full "90s" demo with fx that do not fit a scifi theme... so that's basicly the result.... :D
Then I spiced that up with some nice references like Amiga ball loading fx plus Thalion intro screen "desired" by Havoc.
sorry for being little bit short but was lacking of time... :D

post-528-0-56441000-1434868678_thumb.png

dsr_nordlicht_2015.zip

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Heaven, I like you work on the A8 , And I'm pretty lucky that people "from other platforms" do some stuff for the A8 aswell.

But that Thalion tune.... 15kHz are sometimes no fun... particular for melodic stuff...

 

Everytime, listening to some of those, I have to listen to my own version, as a reminder: POKEY can do it better ;)

 

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yeah. I know that version and I even thought of implementing that instead... :) next time.... the key here was the strange thing that the replay routine played the song differently than the RMT on windows.... so Miker/Triace needed to fix/patch in a short time to make it fit to the demo....

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Really like it but its a shame that a demo which uses the space bar to skip a part crashes if you dare touch it on the second part :)

 

After the torus part goes then it becomes deadly to touch the space :)

 

Purely an observation, not a criticism in any way...

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some informations regarding the FX itself:

 

- The Thalion repaint was done by Havoc. We took the original screenshot from Atari ST, repainted the logo part and then run it several days through rastaconverter

- Amiga ball was done by me, converted into A8 format with G2F

- Torus was coded by Sandor Teli back in 1996/97 and was written in Atmas 2 assembler... So I took all the sources, converted it to use in MADS and reworked it and made it little faster

- Interference Bump mapping was borrowed from AD:6502... ;) shame on me reusing code :D

- Plasma was coded by Tamas Bene in Atari Macro Assembler... so same here... converted for MADS and made it nicer and fullscreen :D

- xBIOS V4 was used as boot loader

 

main task was having all FX in RAM but the Torus used a lot of the RAM so only 2 additional fx could be put in RAM, too...

 

I guess it took more time in getting all the sources from native format into a modern usable format than coding ;D

 

 

stay tuned for more HARD resourrected code :)

 

ah... and just in case you did not read the scroller... Richard Karsmakers did write some text, too... yeah... former Thalion member... http://thalion.exotica.org.uk/corporate/people/richard_karsmakers/richard_karsmakers.html

Edited by Heaven/TQA
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Beginning of the year I finally got in contact with main coders of HARD. Yes. the guys who coded Veronica and Joyride demo.

Would you please ask them whether their contact can be passed to me? I would like to invite them to the "Csokonai Mikroklub" (https://www.facebook.com/pages/Csokonai-Mikroklub/1472955952923592).

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@Heaven/TQA. I tried to PM this and think your inbox is full or broken. Know it's off topic but hope you can help. Btw great work on the new demo too:)

 

Hi,

 

I am looking to debug my xl reimplementation in vhdl. Your fractal landscape (from http://www.pouet.net/prod.php?which=64493) is one of the few things which breaks it. Would you be willing to share the code for this part? Or some comments on what tricks are used? I'd have guessed mode 10 with vscrol trick to reduce dma. I get some corruption scrolling up the screen, I guess down to the specific timing of vscrol changes.

 

Its a little trick to capture the failure on the logic analyzer, if I can make a fairly static screen from it that fails then I can debug it much easier:)

 

Many thanks,

 

Mark

Edited by foft
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loft... lovely AA mail inbox limit... ;) will keep an eye on it... but you can rech me via mainmail email de if you wish.

 

regarding the fractal part...

 

there is nothing special here.... not sure if I am using vscrol at all as it's 4:2 resolution and vscroll trick would not gain here anything. what is done is extensive bank switching for the data streaming... could this be the reason?

 

but I can have a look into AD:6502 source code if you like. the problem is that I can send you the source of the part 1 no problem with that but you need the complete source incl. data files and build scripts and as usual prior deadlines this gets messy in the end... :)

 

have you investigated with Altirra to see what it might be the issue?

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Thanks. Very helpful to have some pointers. I should have looked at the dl;) I thought bank switching and low res modes were now solid. I wonder if I should delay on portb switch a few cycles. Is it doing cycle exact bank switching?

 

Edit: yeah should take a look in altirra. I have more time for forum posts than debugging these days!!

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As far as I remember I am not doing cycle exact things... Waiting for the renderer switching DL and bank. I think I am using 3 or more banks for data if I remember it correct.

 

But this part is necessary of being 100% XE compatible as antic is displaying $4000-7ffff while CPU is accessing same area but main ram not XE (or other way around). Need to look into it. Can not remember but I like that feature that antic can access ram banks while CPU is in a different section. The speed code for rendering must be same area.

 

Yeah something like this... The ram banks contain the rendering data and look where the Antic access and display data.

 

http://youtu.be/NU2QJa8cg7s

Edited by Heaven/TQA
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you can reproduce the stuff in Altirra... simply play around with the RAM settings and you see that the glitch will only appear in expansions which are not 100% compatible to 130XE meaning ANTIC/CPU can have separate BANK access via $d301.

 

still looks good... did not watch AD:6502 since 6 months or so... :D

Edited by Heaven/TQA
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I think there is a little more to it. Since if I'd got that completely wrong shiny bubbles and video blitz wouldn't work.

 

I checked my logic and it is as follows, which I thought was correct:

bit5 low and antic access -> antic ext bank (bits 2/3)

bit4 low and cpu access -> cpu ext bank (bits 2/3)

Hmmm.

 

Anyway now I know I can have a look at it in the Altirra debugger. e.g. when the bank switches are happening. Just before a DL read or in the VBI etc. Thanks:-)

 

Oh and yeah it looks great:-)

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