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flashjazzcat

New (alt) BIOS for Ultimate 1MB/Incognito

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The loader on the cart will run when the HDD is disabled. This is because it's a cartridge like any other but is suppressed when the HDD is turned on. Normally one would have no need to attach a SIDE2 unless the HDD is enabled.

 

If you turn everything (PBI and SDX) off in the U1MB and set the SIDE switch to SDX mode, UFLASH should auto-detect SIDE allowing safe flashing of all components (1MB RAM required).

 

ATR swapping is broken as of December 2016's update and I didn't hear about it until a week or so ago (thanks to the person who reported it!). Popular feature, then. :) It's fixed in the pending update and you will receive a copy via PM tomorrow. ;)

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Hey, I use the swap feature, but didn't update my firmware for a very long time until a couple weeks ago when I did notice that the swap wasn't working, but just figured I'd look into it more later.

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Soon. The ATR swap feature has been working the whole time with my personal builds so the news it was broken in the last public release was most surprising. ;) Unfortunately the dual CF card PBI BIOS for the 1088XEL's XEL-CF is proving to be absolute torture to get right for some reason, and I want changes synced across all builds.

Edited by flashjazzcat
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Unfortunately the dual CF card PBI BIOS for the 1088XEL's XEL-CF is proving to be absolute torture to get right for some reason, and I want changes synced across all builds.

 

It was an ambitious project to provide the dual drive functionality. Let's hope it gets used more than the swap button feature apparently did ;) . Hey it only took 3 major board revisions to get the XEL-CF to behave better (maybe i should knock on wood just to be sure).

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Yep. Note the previous post was written before the crossings out appeared in your bug report. :) It looks likely that we are almost done.

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If you turn everything (PBI and SDX) off in the U1MB and set the SIDE switch to SDX mode, UFLASH should auto-detect SIDE allowing safe flashing of all components (1MB RAM required).

SIDE1 also?

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If anyone aside from TheMontezuma is interested in testing the release candidate firmware, please let me know. It appears to be feature-complete now but I have a couple of extra pairs of eyes on it pending release of the final build this week. :)

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I’ll give it a shot.

 

If anyone aside from TheMontezuma is interested in testing the release candidate firmware, please let me know. It appears to be feature-complete now but I have a couple of extra pairs of eyes on it pending release of the final build this week. :)

 

Sent from my iPhone using Tapatalk

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If anyone aside from TheMontezuma is interested in testing the release candidate firmware, please let me know. It appears to be feature-complete now but I have a couple of extra pairs of eyes on it pending release of the final build this week. :)

I would like to try the new RC on my 800XL [PAL] that has been an under achiever since the last release in December 1916.

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I'm interested in testing the RC firmware. :)

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Installed OK and seems to work well - did you have a list of fixes besides the ATR swap and the ctrl/shift/esc/reset (that works great by the way) that you wanted to focus on?

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That's excellent news: thanks. :) That's two happy testers so far. The changelog (which covers incremental fixes and changes over a fifteen month period) would be difficult to digest, so I'll just summarise those areas which could benefit from wider testing:

  • PBI High-speed SIO. Standard-speed fallback bug (first exposed by the Mega-Speedy NTSC issue over a year ago) fixed, but some other optimisations were made. These appear to have caused no issues, and I've been running divisor 0 with SIO2PC and RespeQt for the past week or so with absolute reliability, but testing with - for instance - actual disk drives has not happened for some time.
  • VBXE core detection was completely broken when the GTIA core was present, resulting in a complete inability to reinstate the FX core, since the BIOS would - having failed to detect VBXE at all - lock out the $D6/D7xx decoding. The VBXE detection method was therefore completely changed. The BIOS now probes the AVR in much the same way as the FC.COM VBXE core flashing tool, and is as a result able to detect the GTIA core (this change was the reason very limited VBXE AVR emulation was built into Altirra).
  • ATR mounting and host FAT registration were completely rewritten, and the PBI BIOS no longer looks for FATs when parsing the MBR on the disk. Older versions would register the first FAT as host partition 0, enabling the original loader (which only recognised one FAT anyway) to mount ATRs without worrying about registering the host partitions. In the latest firmware, the loader is entirely responsible for host partition registration, since it made little sense to me to arbitrarily register the first FAT in the MBR when up to fourteen FATs per disk are supported. Admittedly, the vast majority of users probably only use one FAT partition anyway, but removing FAT width calculation code from the PBI BIOS reduced complexity and freed up space.
  • Regarding MBR parsing: extended boot records (EBRs) were not reliably scanned in older versions, but this has also been rewritten so that the aforementioned fourteen MBR partitions are now fully supported. Only those FAT partitions whose boot sectors are formatted and recognised will show up in the loader, so if you go directly to the loader after initialising a CF card with FDISK, do not be surprised if the FAT doesn't show up. The MBR partition ID is no guaranteed indicator of the FAT width actually employed when the partition is formatted, since Windows, Linux, et al will choose the most appropriate FAT width for the volume size unless directed to do otherwise. I recently noted a situation where a FAT partition with a FAT32 MBR partition ID had been created, but formatted FAT16 on the PC. This led the user to believe the partition was FAT32 when it was not, but the loader reveals all anyway. ;)
  • The low-level XEX loader (which resides between $700 and $9FF) has seen some revisions and code shrinkage, and some titles - notably including the Bash! demo - now load properly (Bash! is coded in such a way that it tends to crash if the stage 2 VBLANK fires during the loading process, so CRITIC is now asserted for the entire duration of the XEX load, not just during actual sector IO).
  • The PBI BIOS and loader - which are both built from the same common source when targeting U1MB, SIDE, Incognito and the 1088XEL - have been heavily revised in order to facilitate conditional assembly aimed at dual-drive setups (i.e. the 1088XEL). This arguably did nothing but good, especially considering the PBI BIOS was originally written some six years ago and aimed at a completely different main BIOS and loader. However, with change comes the possibility of breakage. :)
  • The PBI BIOS's add-in vectors were slightly changed to accommodate the 65C816 high-speed ATA patch which I'd always intended to write but had never gotten around to until now. Functionality is basically identical to that of the TURBODRV.SYS driver for IDE Plus 2.0/Rapidus, with the exception that direct IO to high linear RAM is supported via the XDCB (accessed by setting bit 7 of DDEVIC). It's a bit of a transitional implementation, since not every SIO command is aware of the 24-bit buffer addresses (status, PERCOM, etc, won't handle it), and the HSIO driver is completely oblivious to it too. But no DOS currently worries about direct sector transfers beyond 64KB, so the feature is probably of hypothetical interest at the moment. The main benefit of the RAPIDISK driver (which will be included with the final release bundle) is that it facilitates a c. 3 x speed-up of hard disk IO in normal circumstances when using a 65C816 OS and a 20MHz CPU. The driver also patches ATR access, so you can see ATR IO match the speed you'd see with a standard HDD partition at 1.79MHz.
  • ATR mounting is fairly mature now but I'm always interested to hear of issues with what is a rather complex implementation. After all, the implementation is somewhat unusual in that it permits r/w mounted ATRs in FAT partitions to co-exist with actual APT hard disk partitions, and allows copying of data between them. A read-ahead caching system is used as well, in order to speed data transfer. There is even a tool (ATRMNT) which has been updated for the new firmware which allows mounting of ATRs direct from the SDX command line when the SDX FATFS.SYS driver is installed. Multiple FATs are supported. Many thanks to Łukasz Maśko for showing an interest in this tool and prompting me to update it for the new firmware.

That's just a taster, anyway, and I tried to be concise, believe it or not. :) The changelogs are quite long.

Edited by flashjazzcat
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If anyone aside from TheMontezuma is interested in testing the release candidate firmware, please let me know. It appears to be feature-complete now but I have a couple of extra pairs of eyes on it pending release of the final build this week. :)

I like to give it a go too.

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Do you have an Incognito build that needs testing?

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I like to give it a go too.

 

Thanks. Sent! :)

 

Do you have an Incognito build that needs testing?

 

Yes: I just need to give it another quick test on my 800 before unleashing it on your machine. I'll PM it over the weekend. Thanks in advance.

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Nothing but good words about this Bios. I have been able to Flash 3 Bios. An Atari 130 XE, and 2 800XL , but my PAL 600XL just quits after Highlighting the Bios Slot and pressing Return key. A lot of programs don't run on this PAL machine I only keep it for the stereo and Raster View pictures.= Games.

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Thanks Roy.

 

A lot of programs don't run on this PAL machine I only keep it for the stereo and Raster View pictures.= Games.

The file selector uses PORTB RAM, so it sounds like it's crashing the moment it banks in extended memory. I saw a similar situation with another U1MB board and it was a year or so before I discovered that reprogramming the CPLD fixed the problem, but not before I'd used the board as a CPLD donor and carried the fault across to the target board. :)

 

BTW: Fixed a minor bug in the loader since issuing the RC which resulted in spurious host partition IDs appearing next to entries in the MBR partition list when the PBI BIOS is disabled. Haven't found any other other major problems and I've almost finished updating the APT toolkit. Here's APTDEV logging two PBI IDE host adapters in Altirra:

 

post-21964-0-11194300-1522485280.png

 

As a result of updating the tools, I've also stopped relying on PDVMSK as a means of reporting the controller ID, since this is unreliable when multiple PBI devices are present. The PBI BIOS now reports the PBI ID derived directly from the BIOS configuration.

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Erm... I'd need to know how you have the emulator (mis)configured, since I use UFLASH in Altirra constantly while developing the U1MB firmware. Looks like there's some ROM in the way (SIDE2 with on-board SDX enabled, etc).

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