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BigO

What I Did On My Christmas Vacation

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Happy New Year!

 

Only 87 more of 95 chips to blindly test and 12 electrolytic capacitors to replace.

First tested chip was bad. Replacing it (socketed now) cleared up duplication of the bottom row of ships. Ships are all still displaying "phase 1 of sinking" images. Have found one more bad chip to replace so far...

 

Anybody happen to have a schematic for Meadows' Bomb's Away? I have an official manual which has full schematics for the monitor so I should be able to get that going, too. But no troubleshooting chart or schematics for the main board.

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I don't remember where I got that test clip, but it sure does come in handy.

 

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Shown on my portable CRT TV. Outputs fine to LCD monitor from DVD player, too.

 

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Replacing 7410 @ E1 eliminated doubled ships on bottom row. The doubled ship was near the expected ship. With this chip removed, the score sits at 00/00, coin and start buttons have no effect. Replaced initially with a CMOS chip. Will put in TTL when available.

 

 

1/3/2016 - found a bad hex inverter (SN7404). New TTL chips aren't as cheap as I'd like.

The D-Flip Flop that keeps switching Q/Q* with no clock or change on D is going to have to go also, to but it is coming up obsolete and a little tricky to find. I'll try to salvage some from my pile of old circuit boards before I buy new. After all, that *is* the excuse I've used for keeping all that junk for 20 or 30 years... :)

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Parts are in. Time to replace all of the 40 year old electrolytic caps and see if that cleans up some of the malfunctions.

[Edit]: new caps didn't change anything :(

 

Back to testing chips.

 

[1/12/15]: Kinda bored with brute forcing my way through, chip by chip checking for valid outputs vs inputs. Have found a couple that were behaving badly and swapped them resulting in some minor improvements. Haven't made it through all of the logic chips yet, but will get back on that track soon, probably.

 

There are 3 ROM chips that should hold the graphics information for the ships, etc. The ships always show as the first stage of sinking instead of the normal, fully floating image. But, they do sink when hit. I'm going to see what the addressing on those chips looks like. I'll backtrack from the ROM chips and see what controls the addresses. Maybe there's a counter that's supposed to be sequencing through the addresses, but isn't working right. There are a lot of counter chips.

 

[1/13/15]: At least part of the ROM addressing is being done by the outputs from a full adder (pin 1/A6 of all 3 ROM chips). Fun to trace. Need some more logic analyzer channels! I guess I'll have to break down and draw at least a partial schematic to track the addressing back.

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Hi there,

 

I know this is a year old thread, but I don't suppose you ever tracked down a set of schematics for this PCB? I'm currently repairing one and it has a few faults left and the schemes would make life so much easier!

 

Cheers, Mart.

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Nope. Never found schematics. I started drawing one, working from the ROM outward to see if I could figure out how the ship images were retrieved in the hope that I could figure out why my ships always looked like they were sinking. I didn't get very far before I went back to brute force: pulling, testing, socketing every chip.

 

I'm down to about 25 chips remaining. None are supported by my ic tester so will be building test circuitry and doing it the hard way.

 

I hope you find a faster way. I am not sure if I will ever finish this tedious process.

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