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retrocanada76

Designing an Axlon compatible board

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Hi all,


Since I cannot find any Axlon board to buy I decided to design my own Axlon compatible RAM board using 512KB Static RAM. I've designed some hardware for coco computers but for Atari that would be my first project.


I've pretty much drawn the design:


- It would sit in middle slot and I'd be pulling /S6 from OS-Board.


- The static RAM would be disabled whenever /S2 and /S3 are high or /REF is low.


- The bank register is a 4-bit flip-flop (I could make it 5 bit to use 512KB)


- Power on reset would set the initial bank to 0


But I need to decide few details:


- Should it use 0xCFxx or should I lock into 0xCFFF ? Which address does SDX use for BANKED ?

- Should I care fro the shadow register 0x0Fxx or should avoid it at all ?

- Should the bank be zeored in the reset ? If so, how axlon does that ? Does it pull the RES line from CPU ?

- Should I use early R/W or late R/W signals ? Are all data and address lines set in the early ?


Thanks,

Edited by retrocanada76
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I have a 512k SRAM board for the 800. I think it is Axlon compatible. I'll dig it out tomorrow and take a look at the docs. I remember that it came with info on modifying Mydos for the big ramdisk.

Larry

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Hello Larry

 

IIRC, Axlon support was fixed in MyDOS 4.55 beta 4.

 

Sincerely

 

Mathy

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Here is a link

 

www.bobhays.com/atari512k.html

 

The docs and site don't actually say it is Axlon compatible, but perhaps you can tell for the other info provided. He did use Mydos 4.53/4 for this project.

 

Larry

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- Should it use 0xCFxx or should I lock into 0xCFFF ? Which address does SDX use for BANKED ?

Don't know about SDX at all. Axlon documentation suggests using 0xCFCx region

while noting that this is actually the shadow of 0x0FCx which is the only

address showing up at the slot used for a real Axlon board. 0x0FC0 thru 0x0FFF

is the actual actuating locations with 0xCFC0 thru 0xCFFF being the

shadow of that working location which also works the bank selection logic.

 

 

- Should the bank be zeored in the reset ? If so, how axlon does that ? Does it pull the RES line from CPU ?

No it does not have a RESET connection at all, most latches do however have a

RESET function which can be combined with a capacitor/resistor pair to allow

for a RESET pulse to exist after sufficient power on time has passed such

that the latch is properly RESET - but not all latches are the same, some

reset to zero, while others reset to all ones. And then latchless designs

come along to defeat the proposed purpose entirely.

 

In the case of the real Axlon it doesn't matter anyway since DOS is yet to

be loaded and whatever the last byte is that is stored at 0x0FFF determines

the 'home' bank anyway. An exceptionally stupid way to do it if you ask me,

which I why I'm thinking bank 0 should be the 'home' bank since all size of

Axlon would contain bank 0 while bank FF might be something nebulous

depending on exact glue logic used and we really can't know this part

universally, especially as to new designs. Software also an issue with

FF for home banking on the Axlon, no universal standard exists or is

adhered to that I'm aware of.

 

Bank FF is the home bank for portB type ramdisks just as an aside.

 

The 0xCFC0 thru 0xCFFF scheme is capable of (64) 16 meg ramdisks.

Hardly a reason for such a beast to exist, the potential for it

is still there.

 

- Should I use early R/W or late R/W signals ? Are all data and address lines set in the early ?

Concerning myself primarily with the software side, I have no opinion or

experience to suggest anything here.

 

The Bob Hays unit seems to break the rules at 0xEFxx region. Modified 4.53

MyDOS would be a modified version and only Bob and the lord knows what

was modified there. Beta 4 MyDOS 4.55 has some Axlon code added in an

attempt to correct the code such that it might work better - no testing

was possible due to the rarity of real Axlon boards. But zero is stored

to 0xCFFF in both DOS.SYS and the companion MyRD ramdisk program in an

attempt to home bank with zero for Axlon detected ramdisks.

http://www.mathyvannisselroy.nl/mydos.htm

 

axlon_manual.zip

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I have superram 800. axlon compatiable. will try and do up a schematic for it sometime soon. Do know that bank select is $CFFF.

 

James

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- Should it use 0xCFxx or should I lock into 0xCFFF ? Which address does SDX use for BANKED ?

SDX uses $CFFF. Also the Antonia, when set in Axlon mode, reacts to writes to $CFFF (only).

 

- Should I care fro the shadow register 0x0Fxx or should avoid it at all ?

These do not seem to be used. SDX memory management skips that area when the 800 hardware was detected.

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This shadow register exists because Axlon doesn't pull the /S6 from OS-board (or /S0 from RAM1). So it never knows if the bank is S6 or S0. But it knows for sure that is not any of S2, S3, S4 and S5. The addresses 0xCFxx and 0x0Fxx

have the same visible bits.

 

I've simplified my design, I don't need to care about /REF anyway, just /S2 and /S3. Then I'll be using:

 

74LS04

74LS08

74LS138

74LS273

AS6C4008 - 512K SRAM

 

I can easily add a power on reset on the octal flip-flop. It will be using 5-bits for 512K.

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The Bob Hays unit seems to break the rules at 0xEFxx region.

 

 

That explains how he managed to use only 2 TTLs for the logic.

 

I had to use 3 for the 0xCFxx range.

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Superram 800 uses the original chips on the ram card.The unwanted power tracks have been cut. Added chips are;

74LS573. Latch for $CFFF

74LS133

74LS158 x 2

74LS112

74LS27

 

James

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And it's ALIVE!

 

I made a proto board to be used as ram or rom card. (the VCC is not connected).

 

Anyway, it works really well :D I going to make a schematics for it.

 

512 KB fully Axlon compatible 0xCFC0 and no shadow register.

 

Now my next challenge: make a OS-RAM card and maybe run 800XL rom. Also, I'm thinking adding Mr. Atari internal IDE :D

 

 

post-47253-0-03737300-1472930981_thumb.jpg

post-47253-0-21728600-1472930987_thumb.jpg

post-47253-0-43527300-1472930992_thumb.jpg

post-47253-0-41070100-1472931000_thumb.jpg

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Here the gerber files with few improvements I think was needed. Extra padding on edge connectors.

 

You can order them from http://www.allpcb.com/it will cost you 15 dollars + 10 shipping depending where you are. You can choose to DHL express for 10 more (at least for me). I've submitted my files on Sunday night and got the boards by Friday afternoon, here in Canada.

 

You can use the boards as ram or personality, since the VCC line is not connected, so you can route it as you want.

 

Enjoy

 

 

 

ATARI800-PROTOBOARD.zip

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yes you need. This one goes in the middle slot and you still need the 16K on both 1 & 2

 

I guess many of us have the same idea when reading this thread: using some free slots to make new cards

So, would it be possible to go a step further and

- either make the middle board handle all the RAM (not only the middle 16KB). This will free at least the last slot.

- or (better) make a single board for ROM (eprom) and RAM to replace the personality board. This will free 3 slots

Because your proto board is great and if there were any slot free, one could try to build a different kind of extension to plug in the 800.

In another thread about a 1090 expansion clone, someone gave a list of cards which could be created (can't find it right now).

Why not try to build them for the 800.

It would give the 800 the "open spirit" found in the Apple II.

Am I the only one who is frustrated to not being able to use the slots for someting else than the ROM/RAM ?

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The middle board could have the slot3 ram on it, but not the slot1 because the signals needed are not there.

 

But then it would require extra SRAM chip for the 16KB (the smaller I found was 32K SRAM). Trying to use a bank from the ram drive would make the circuit far more complex, also more gates for the extra logic.

 

I'm planning to make a OS-ROM with an Cyclone IV connected to it :D, then the sky is the limit....

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