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New MAME release


mizapf

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Does that look promising? :)

 

I guess it won't make it into the next release, because we always have a freeze one week before last Wednesday, but it will very likely be in next month's release. Anyway, I still have to do tests and see whether everything runs well. But as you see, CALL PG is already working, the clock is there, so things look positive.

 

You may wonder why there are noticeably many new features in the TI emulation in MAME right now.

 

It does have to do with the Corona crisis. Our university has postponed all lectures by five weeks ... although I wonder whether we will really start on April 20. We have some concepts for preparing our lectures in digital form, but on the other hand, the university administration said we must not assume that all students have sufficient technical infrastructure at home, so all material that we upload now is understood to be consumed on a voluntary base, and must be repeated when the lectures actually start. Then we will have to work until mid-August (instead of mid-July).

 

I am far from complaining, though. I can't do much more but to wait, and I can't really do productive home office work. Maybe I'll start to work over my slides starting from next week, see how far I'll get. At least I don't get bored yet.

 

0118_2x.png

Edited by mizapf
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3 hours ago, mizapf said:

PGRAM users: Is it normal that there is no Master Title Screen beep when the card is active (SW2 open)? The selection menu beep is there, though.

I think there was a modified upgrade to the GRAMKRACKER that did that just two bytes and it auto bypassed title screen, take a look at the header to see.

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For the PGRAM I found that during the powerup initialization, some code is installed in RAM at C000 that is executed immediately, which does a CLR @>83CE. This prevents the interrupt routine to play the beep sound list. It does not skip the Master Title Screen, though. So this means that the beep is intentionally suppressed and that it is not an emulation glitch.

 

As a similar experience, I remember that the GPL files for the Geneve were patched to skip the MTS. I never understood why. The MTS is not so ugly that it needs to be patched away, so among the first things what I did for my Geneve back when I got it was to revert that patch. (Instead, I patched a German text into the MTS.)

 

So after a day of bug hunting, the PGRAM seems to work as expected. I'll just check whether the PGRAM+ version is also correctly implemented, then I'll commit it to the source tree.

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  • 2 weeks later...

The new MAME release is there, some days delayed.

 

As promised, it contains new emulations for

 

- Corcomp Disk Controller Card (first version)

- Corcomp Floppy Disk Controller (Rev A)

- Myarc Disk Drive Controller Card 1 (DDCC1)

- FORTi sound card

 

The PGRAM will be available for the next release, possibly also the IDE card.

 

Get MAME from https://www.mamedev.org/release.html

or from WHTech,  https://ftp.whtech.com/emulators/MAME/full/windows/

 

where you also find my installer script.

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1 hour ago, mizapf said:

The new MAME release is there, some days delayed.

 

As promised, it contains new emulations for

 

- Corcomp Disk Controller Card (first version)

- Corcomp Floppy Disk Controller (Rev A)

- Myarc Disk Drive Controller Card 1 (DDCC1)

- FORTi sound card

 

The PGRAM will be available for the next release, possibly also the IDE card.

 

Get MAME from https://www.mamedev.org/release.html

or from WHTech,  https://ftp.whtech.com/emulators/MAME/full/windows/

 

where you also find my installer script.

SCSI soon maybe ?

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SCSI may take a bit longer (although I am also interested myself). While I guess there are already emulations of SCSI chips in MAME somewhere, those SCSI cards have custom chips, and I don't know whether we have sufficient information about them.

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2 hours ago, mizapf said:

The new MAME release is there, some days delayed.

 

As promised, it contains new emulations for

 

- Corcomp Disk Controller Card (first version)

- Corcomp Floppy Disk Controller (Rev A)

- Myarc Disk Drive Controller Card 1 (DDCC1)

- FORTi sound card

 

The PGRAM will be available for the next release, possibly also the IDE card.

 

Get MAME from https://www.mamedev.org/release.html

or from WHTech,  https://ftp.whtech.com/emulators/MAME/full/windows/

 

where you also find my installer script.

Cool, never saw the P-Gram in action!  (only a picture of it and some manuals i believe), published in TIjdingen last time. My Gramcard/Gramkarte sold it last time, but i have the GramKracker and Gramulator still with me. There is a disk which describes all the headerrs (by Eric Paul Rebel), I have the disk and think shared it somewhere on atariage.

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Another good news ... seems as if Thierry's IDE card is now working in MAME! :)

 

You'll get it end of this month at the latest.

 

(Grr... I can tell you, I spent two days debugging that thing until I re-read Thierry's manual most diligently, and then I finally learned when to activate the bootstrap code. That d** thing was working all those last two days! :P No wonder I could not find the error.)

 

The emulation covers both cases of buffered SRAM and unbuffered SRAM. I chose the RTC-65271 as clock chip.

0121_2x.png

0122_2x.png

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Can anybody read the text near the DIP switch on the IDE card? (just for documentation purpose) Maybe someone has such a card to check. (The picture is from Mainbyte's site, but the resolution is not high enough.)

ide_card_front.jpg

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5 minutes ago, mizapf said:

Can anybody read the text near the DIP switch on the IDE card? (just for documentation purpose) Maybe someone has such a card to check. (The picture is from Mainbyte's site, but the resolution is not high enough.)

ide_card_front.jpg

 

"RESET" and "BOOT"

 

grafik.thumb.png.14e1dcafe08c4d0c6a947b7c9f8709ee.png

 

 

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While digging through the code, I admit I am honestly impressed by Thierry's work.

 

The card comes without any ROM, but it bootstraps itself from a miniature memory in the clock. To make things worse, you can only map 32 bytes of the clock at a time. These are two lines in a debugger memory view! The clock has 128 pages of 32 bytes each. (Note that the last sentence has 41 characters and would not fit into the page.)

 

So the first thing it does is to assemble a copy loop from 7 pages of the clock memory, where a good portion of the code is just intended to get more code from more pages. Those 32 bytes do not even suffice to write a complete copy loop in one go. Once it manages to reassemble its copy loop, it copies the remaining page contents into a contiguous area in the SRAM. This code then attempts to load the DSR files from the IDE hard disk into the SRAM. If the SRAM is battery-backed (and the DIP switch is set to boot), it will show up in 4000 on the next power-up; otherwise, this bootstrapping occurs every time the machine is turned on, and it delays the master title screen by some seconds.

 

I guess Thierry won't object if I show you the initial bootstrap code in page 0 of the clock. The address 4080 is the page register, so the instruction at  4018 maps page 1 into the same space and continues on address 401E of that page. The CRU operations are needed to ensure that the SRAM is not mapped out. Note that this block of code takes the whole page 0 of the clock memory (32 bytes)!

 


4000:     DATA >AA01,>0044
4004:     DATA >400E
4006:     DATA >0000
4008:     DATA >0000
400A:     DATA >0000
400C:     DATA >0000
400E:     DATA >0000,>4012
4012:     SBO  3
4014:     SBZ  5
4016:     SBZ  2
4018:     AB   @>4001,@>4080
401E:     RT

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17 minutes ago, mizapf said:

While digging through the code, I admit I am honestly impressed by Thierry's work.

 

 

So question.  Most are recommending to go with Fred Kaal's latest IDE DSR of Thierry's IDEAL.  Is there an option to implement Fred's DSR for the IDE within MAME?

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Many thank you's to Mizapf for taking the time to answer numerous MAME related questions and helping me get up and running. 

 

You've done a terrific job enhancing and supporting TI emulation in MAME and just wanted to let you know how much it's appreciated.

 

It's nice to have great emulation options, including Tursi's excellent Classic99.

 

Thank you!

 

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32 minutes ago, Shift838 said:

So question.  Most are recommending to go with Fred Kaal's latest IDE DSR of Thierry's IDEAL.  Is there an option to implement Fred's DSR for the IDE within MAME?

 

Well, if Fred's IDEAL does not require any mod to the IDE card, it should run on the emulation just like on the real thing. (MAME's claim.) :) I'll go check it.

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I'm about to write an emulation for the missing BQ chips. The RTC65271 supports leap years, but I could not find anything in the specs of the BQs. I guess some of you have a card with that chip (BQ4847, 4842, or 4852).

 

Test: Set the date to Feb 28, 2020, 23:59 (11:59 pm) and wait for a minute. Maybe also try Feb 28, 2100 (not a leap year).

 

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4 hours ago, mizapf said:

I'm about to write an emulation for the missing BQ chips. The RTC65271 supports leap years, but I could not find anything in the specs of the BQs. I guess some of you have a card with that chip (BQ4847, 4842, or 4852).

 

Test: Set the date to Feb 28, 2020, 23:59 (11:59 pm) and wait for a minute. Maybe also try Feb 28, 2100 (not a leap year).

 

i'm getting ready to test the BQ4802-YDW clock chip by TI on the IDE card.  I have discussed this chip with Fred and it appears (at least in the datasheet) as compatible with the BQ4847, just without the battery, which I have added to a small daughter board.  

 

I'm just waiting on my IDE boards and a few components to get here before I start my test assembly.

 

 

Edited by Shift838
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So this was yet another pile of work ... a bit more than expected. I actually wrote an emulation of the BQ4842/4852 from scratch, then of the BQ4847, where it proved hard to get any information for.

 

If you have a complete datasheet for the BQ4847 I'd be happy to get a copy; but note that all datasheets of this chip that you find via Google are 5-7 pages long and lack almost all important information. You can see that parts are missing when you read "Figure 2 illustrates the address map for the bq4847", but there is no such figure. In fact, the ONLY information about the BQ4847's registers is on Thierry's page.

 

When I found out that the 4847 is pretty different from the 4842/4852, I had to rework my already existing class structure; it did not make sense to set up a common superclass anymore. When it all compiled, I tested Thierry's IDEAL versions, but only to find that 1.1 works with the RTC-65271, 1.2 works with the BQ4847 but has issues with the RTC-65271, and 1.3 was promised to work with each of them, but I did not get much further than setting the clock and creating a virtual disk. On first write to the virtual disk, I got a crash (there was a branch to 0000 at some point).

 

Then I took @F.G. Kaal's IDE DSR, and ... It seems to work!! (here's a double exclamation mark, as a sign of BIG relief).

 

Since this was quite a bit of complex work, please be aware that there may still be bugs, but I dare to say we're on a good way towards IDE card support in MAME. My recommendation is to use Thierry's IDEAL 1.1 with the RTC-65271, and Fred's IDE DSR for the other chips.

 

Pics or it didn't happen:

0125_2x.png

0126_2x.png

0127_2x.png

0128_2x.png

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  • 4 weeks later...

i get this error now for some reason? doesn't seem to effect anything though:

 

[lua error] in run: plugin\boot.lua:38:bad argument #1 to "for iterator' (table expected, got sol.core_options*)

 

here is a example execution string: ti99_4a -window -skip_gameinfo -video gdi -autoframeskip -natural -inipath ini\ti99std -cart ..\software\cartridges\xbea.rpk -ioport peb -ioport:peb:slot2 32kmem -ioport:peb:slot3 speech -ioport:peb:slot6 tirs232 -ioport:peb:slot8 hfdc  -flop1 ..\software\disks\xbasic\xbeaboot.dsk

 

I just updated all my MAME to 221 from 192. any idea what i may have not changed right?

 

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Maybe you should unpack the new release in a new folder and move your own stuff (cartridges, disks) to the new folder. The Lua stuff surely has evolved a lot; can't give you more details on that, since I did not follow the Lua development.

 

[Edit: 0.221? That's not released yet. You're not a time traveller, are you?]

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30 minutes ago, mizapf said:

Maybe you should unpack the new release in a new folder and move your own stuff (cartridges, disks) to the new folder. The Lua stuff surely has evolved a lot; can't give you more details on that, since I did not follow the Lua development.

 

[Edit: 0.221? That's not released yet. You're not a time traveller, are you?]

oops, make that 220. didn't look at right. :)

like I said, it doesn't effect the emulator just kicks out the error.

 

Edit:

in PLUGINS I renamed the BOOT.LUA to OLDBOOT.LUA and the error went away. Not sure of the consequences of doing that though, but there doesn't seem to be any at this time.

 

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To compare system speeds, I built MAME on my PC and on the Raspi4:

 

Full MAME build

Raspi4: 19099 sec

PC: 2463 sec

 

TI family-only build

Raspi4: 2129 sec

PC: 448 sec

 

(PC has a Core i7-6700K from 2016)

 

The full build time on the Raspi4 is still quite good, compared to earlier versions, where it took more than a day for building. Also, it seems as if more file operations have a worse impact on performance (PC with SSD, Raspi4 with microSD class 10).

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