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TIPI - TI-99/4A to Raspberry PI interface development


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"TIPI", I like what's happening here, looking forward to it. Will this work with a raspberry Pi 3, and could the code be ported to a beaglebone? Thinking out loud, don't know anything about them, but do have two Beaglebones, white and black. I am going to experiment in a few months and see if I can go in the same direction. Cool things going on in the TI community ;-)

 

Yes, it should be able to be done with a Beaglebone. In retrospect, we should have used a Beaglebone since they're TI :)

Since Matt has reduced the pin count for the interface to the TI, TIPI should work fine with the older PIs as well.

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Love the idea of a PEB board that could quite literally replace every other card... Being able to fire up a 80 col F18A term program to talk with the PI would also be cool... running MUTT for email on my TI would be satisfying! ;)

 

Yes this would be fairly easy to do. 'tcpser' to the rescue on the Pi. you could connect a RS232 card to a USB to Serial adapter to the pi.

 

Of course not sure if the TiPi is using all the GPIO pins of the pi. If not there could be room to expand there as there are serial lines on the GPIO connector for the Pis. If I recall it's pins 6, 8 and 10. I would really need to test to see if this would work, but it should.

 

I currently run it this way with my MiST machine and use tcpser via the GPIO. I use tcpser with the TI99 on the pi as well via a USB to serial cable then to the TI rs232. I can get up to 38400 with TIMXT accurately this way.

 

So plenty of options I'm thinking..

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I'd rather just write new TCP clients on the 4A and skip tcpser and baud rates and just let the PI do the buffering.

 

But for legacy serial based programs, what Shift838 suggests should work great, provided you have a legacy RS232 card.

 

As for GPIO pin usage.. I have moved to the lower pins on the GPIO header of the Raspberry PI. So that snap on I2C solutions are easy to use, and most of the pins are available for imaginative hackery.

 

I need at a minimum 7 GPIO + ground. But I'm using the 2x5 section at the end, which brings out an extra GPIO and doubles up the ground connection...

 

-M@

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Yes, it should be able to be done with a Beaglebone. In retrospect, we should have used a Beaglebone since they're TI :)

Since Matt has reduced the pin count for the interface to the TI, TIPI should work fine with the older PIs as well.

 

One of the design goals ElectricLab and I both realized and implemented was the need for the communication protocol to work no matter how slow or bogged down the RPi gets. Since you'll likely to turn the RPi into a network file server, or be managing from the web server on board.

 

Also the software side has the IO highly isolated so I would expect it is easy to port to an alternative platform with GPIO and python.

 

----

 

Updated routing and layout has occurred to fit the form factor of the 32k sideport RAM card. Just needs some time to bake in the back of my head, and I need to remap my verilog to the CPLD and check viable pin assignments... :) Routing is the ultimate puzzle. I'm sure I forgot something, or will pretty a few things up. But at least it passes the design rule check. And the parts fit on the paper layout test.

 

https://github.com/jedimatt42/tipi/blob/master/tipi-kicad/pcboard.pdf

 

 

-M@

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  • 4 weeks later...

Some progress yesterday. I finished ordering parts for the first test boards... Boards went off to OSHPark (still private, but designs are on github) last weekend. Ordered a solder paste stencil form oshstencils.com.. I'll see how that goes. Hope to have one assembled by the end of the month. Next two weekends are spoken for, so a good time to be waiting for parts, I suppose.

 

I finished rerouting for the 100 pin CPLD 2 weeks ago, and let it 'stew' for a week before ordering up these test boards. My hopes are high, but I won't be surprised if it's a fail, since I haven't breadboarded the CPLD yet.

 

-M@

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Some progress yesterday. I finished ordering parts for the first test boards... Boards went off to OSHPark (still private, but designs are on github) last weekend. Ordered a solder paste stencil form oshstencils.com.. I'll see how that goes. Hope to have one assembled by the end of the month. Next two weekends are spoken for, so a good time to be waiting for parts, I suppose.

 

I finished rerouting for the 100 pin CPLD 2 weeks ago, and let it 'stew' for a week before ordering up these test boards. My hopes are high, but I won't be surprised if it's a fail, since I haven't breadboarded the CPLD yet.

 

-M@

Wooot! [emoji79]

 

Sent from my LG-H830 using Tapatalk

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I was thinking more like a wifi module on both ends of the gpio connection (ti side and pi side) just to remove the cables.

 

EDIT - Well, after thinking about it, I'll probably just get another Pi for this when it's ready.

Edited by Sinphaltimus
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Ordered a solder paste stencil form oshstencils.com.. I'll see how that goes. Hope to have one assembled by the end of the month.

 

Are you using a reflow oven? If not, you wouldn't need the stencils.

 

Everything on your board can be hand-soldered, especially your resistors. But I recommend to get a flat tip solder iron, desolder wire, and lots of flux. It's almost as easy as it looks here:

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Thanks for the tip tips for tipi... Sorry... Couldn't help myself. :)

 

I chose the 0805 size and larger pads for caps and resistors so they would be hand solder friendly.

 

I've been working with hot air to do SMD to date. Applying sufficiently little solder paste has been my challenge. This is why I want to try the stencil. The cost is relatively nothing if it reduces the amount of fine work.

 

I'm researching reflow oven conversions, which look like a fun project itself. But I haven't committed to that yet.

 

-M@

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i'm waiting with bated breath for when this new piece of hardware is released.

 

Hoping it will also be released ina PEB card form factor to be used with the Geneve as well.

 

I can see this be one of the best leaps for mass storage for the TI and Geneve. I know I would be interested in a few of these. I have plenty of Pi3's to put to use...

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Maybe if I make a 100 of them, I'll get good at it. :)

 

My continuity tester says that I've fixed my soldering mistakes. Hopefully next week, I'll know if I can program the CPLD, and if I can read the eprom from a 4A.

 

And then we can resume DSR development. :)

 

-M@

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post-42954-0-52142700-1503465592_thumb.jpg

 

Well, I can program the CPLD on the board, and after a few verilog tweaks, the 4A powers up.

 

Progress. Doesn't do anything :) But at least keeping it off the databus it doesn't break anything either. The verilog was a rough estimate to fit the design to the CPLD and pin configuration. So now hopefully I can bring up each component up one at a time, and get something working.

 

-M@

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