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TIPI - TI-99/4A to Raspberry PI interface development


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Funny story... It would appear I have all the data lines to the eprom backwards... AA 01 is coming out as 55 80 :(

 

So, now what algorithm can be used to swap all these bits in the image I produce for the eprom burner?

 

I need a bitwise mirror operator :) and new boards, but in the meantime, a bitwise mirror operator will have to do.

 

-M@

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Thanks! But I got it... : )

#!/usr/bin/env python
import sys
import time
from array import array

fh = open("tipi.bin", 'rb')

try:
    bytes = bytearray(fh.read())
    for byte in bytes:
        sys.stdout.write(chr(int(bin(byte)[2:].zfill([::-1], 2)))
finally:
    fh.close()

sys.stdout.flush()

This is lame, but it converts byte to binary string, reverse the string, then back to a number, and then maybe an unnecessary step back to a character/byte

 

My DSR boots :) and has a little audio playlist in the powerup routine, so I know it works :) Hahaha... I wonder how much people will hate that...

 

Next steps are to test transfer of data to/from the RPi... but other than these eprom data lines being backwards, the pcboard is working pretty well.

 

-M@

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Oh, I guess I never cared about this for the 32k board, and with the FPGA design hosting the ROM, I just swapped [0:7] for [7:0] without thinking it through. So...

 

A0 is the MSb of the address bus.

D0 is the LSb of the data bus?

 

Did TI only number the address bus backwards from the rest of the world? Or should I be looking for a double flip in my design?

 

-M@

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Oh, I guess I never cared about this for the 32k board, and with the FPGA design hosting the ROM, I just swapped [0:7] for [7:0] without thinking it through. So...

 

A0 is the MSb of the address bus.

D0 is the LSb of the data bus?

 

Did TI only number the address bus backwards from the rest of the world? Or should I be looking for a double flip in my design?

 

-M@

They numbered the address AND data buses the opposite way to the rest of the world. A0 is the MSb of the address bus, and D0 is the MSb of the data bus.

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They numbered the address AND data buses the opposite way to the rest of the world. A0 is the MSb of the address bus, and D0 is the MSb of the data bus.

Thanks! I swap D0-7 at the databus buffer, but I must have also done at the eprom or at the sideport :( or failed to do so at the buffer. Time to doubt everything. :)

 

-M@

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Thanks! I swap D0-7 at the databus buffer, but I must have also done at the eprom or at the sideport :( or failed to do so at the buffer. Time to doubt everything. :)

 

-M@

I thought I was being smart, I guess, and swapped it at the sideport. Then days later, I thought I was being smart and swapped it at the data buffer :) I'll undo the swap at the sideport, and then reroute.

 

It is extremely lucky that I can work around this mistake temporarily with software :)

 

-M@

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I've got another Pi3 on my Amazon wishlist. :) So ready for this.... Oh, and as you know, I know what it feels like to get everything backwards on the output. ;)

EDIT: Received my second Pi3. This time I didn't get a prepacked deal with the whizbangs. Got a Pi3 model B and a separate kit that came with a power switched cord, heat sinks, a fan and two acrylic plates with screws.
Already assembled and running some things within a few inches of the TI. :)

 

If you need some beta testers in the future...... :)

Edited by Sinphaltimus
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  • 3 weeks later...

The pcboard I have is viable! Not for release, but at least for continued development. The board is up and running finally this evening, after a long weekend of focus. The demos from my previous videos all work on this iteration of the hardware! WOOT!

 

In the middle of things, I doubted my soldering enough that I built a toaster-reflow-oven :)

 

post-42954-0-57291500-1505110320_thumb.jpg

 

I then baked the 2nd board I had, quite beautifully... still some solder bridges to clean up, but much cleaner than my 1st. This only proved that my problems were back in the Verilog.

 

A couple days later, and it works! At least as well as the FPGA prototype I had. But much cheaper, and better looking:

 

post-42954-0-75976800-1505110541_thumb.jpg

 

That is my TIPI pcboard stacked onto the side of my 32k board!

 

Hopefully soon I will be able to report that it is up and repeated at ElectricLab's system.

 

1st thing to do is revise the pcboard layout to correct the DSR rom bit swizzling, and shave 1mm off of the bottom and right edges. Now that I've shaken it down, I am confident nothing else requires revision in the hardware. Next software priority is PROGRAM image save. And onward from there.

 

Joyous time!

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Matt - So damn exciting! Congrats! What a great achievement to this point.

so now a slew of questions.

And looking at the hardware, something comes to mind. TiPi is specifically for TI's that do not have hard disk or floppy disk controllers?
I ask because I'm looking at the interfacing and my main console uses a nanoPEB, not the 32k side cart. My other console uses a PEB. Not the 32k Side cart.
Yes I have a 32k Side cart and it's reserved for traveling when I do not need a DSK drive.

So I'm thinking I would need a third console for TiPi? One without any DSK controller cards? Or will the TiPi be able to do remote DSK operations aside from any exists controllers already on the system?

If it can coexist with other dsk controllers, then I have to ask where I find the pass through adaptors (the file) to order from OSH park? The ones for your TiPi which I assume pass though like the 32k side cart. So in theory, TiPi would plug into my Speech synth and nanoPEB in to TiPi. Much the same if I connected it to my PEB console. TiPi in to Speechsynth, PEB firehouse in to TiPi.

Or do I really need to setup a third console. I will if I have to, no big deal. Just asking. :)

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# Coexistence

 

TIPI has a header block on the left. This is for setting the CRU base address. This allows coexistence and de-conflicting with multiple devices such as floppy controllers and ram disks... By default, with no jumpers on, the CRU base is 0x1000. (The jumpers allow selecting CRU base from 0x1000 to 0x1F00. )

 

At 0x1000, the TI will ask TIPI first when polling the peripherals to handle a DSR request. So... TIPI files are all available under device TIPI.

 

TIPI also responds to DSK1. (I plan to expand this to 0 thru whatever the OS limit is. ) and DSK. When handling a request in this case, if the requested operation can't be handled, such as the file isn't on TIPI, then it will return to the OS as though it doesn't know what the TI is talking about, and the TI will then continue to poll devices at subsequent CRU bases to let them try and handle the request. ( The TI OS was designed with some very cool episodes of forethought )

 

So, you can leave the jumpers off and let TIPI take a swing at any request, or set it all on, CRau base 0x1F00, and TIPI will be the last one asked. Since no-one else services "TIPI." it will still be accessible amongst legacy expansion peripherals.

 

Now, I have no idea how the Nanopeb/cf7 works. I don't own one. Does it use CRU base 0x1000 for anything? Does it use 0x1300 for RS232, 0x1100 for DSK? And another for image management?

 

As for physical coexistence, well for PEB users, including myself, I am going to work on a PEB card. But yes the edge card extension should work fine. And the current pcboard is designed for my 32k card - I have no other adapter design for the left hand side of TIPI.

 

I have done some testing of coexistence with the FPGA prototype, and the TIFDC.

 

-M@

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# Coexistence

 

 

Now, I have no idea how the Nanopeb/cf7 works. I don't own one. Does it use CRU base 0x1000 for anything? Does it use 0x1300 for RS232, 0x1100 for DSK? And another for image management?

 

As for physical coexistence, well for PEB users, including myself, I am going to work on a PEB card. But yes the edge card extension should work fine. And the current pcboard is designed for my 32k card - I have no other adapter design for the left hand side of TIPI.

 

-M@

 

 

I wish I knew enough about HW addresses so I could answer those questions. Perhaps someone with more in depth knowledge of the nano can answer this.

 

As for the edge connector, I could have sworn there was an adaptor design for OSHPark - perhaps I was mistaken. This way TIPI can go directly in to a Speech Synth.

 

I may have to rethink my own setup. Perhaps remove the nano and reserve that for mobility then install the 32k side cart and TiPi (when ready) to my everyday console. functionally, that'd probably work best for me anyway. Then I don't have to be concerned with #CoExistance or adaptors. :)

 

And thank you for that in depth answer, I'm sure others will find it very useful. Glad I asked.

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I've only recently acquired a TI-99/4a console (after having one originally as a kid) and this is very exciting news for sure. I've really enjoyed reading about your progress in this thread and look forward to an official release in the future. Thanks for all your hard work!

Thanks! I appreciate that. Hopefully logging all of this helps anybody who wants to understand the github repo as well. I've re-read some of this myself... And then there is the 16 page thread of PM between ElectribLab and myself... except I'd have to redact it a bit :) But it is good log of technical struggles going back to Dec 31st 2016.

 

At this point, I should be able to bring one with me to Chicago in Oct. Oooh... a new deadline :) (for a milestone)

 

-M@

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# Coexistence

 

Now, I have no idea how the Nanopeb/cf7 works. I don't own one. Does it use CRU base 0x1000 for anything? Does it use 0x1300 for RS232, 0x1100 for DSK? And another for image management?

Pretty sure I tested the CRU base addresses years ago and they were the same as the equivalent PEB cards.

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Thanks! I appreciate that. Hopefully logging all of this helps anybody who wants to understand the github repo as well. I've re-read some of this myself... And then there is the 16 page thread of PM between ElectribLab and myself... except I'd have to redact it a bit :) But it is good log of technical struggles going back to Dec 31st 2016.

 

At this point, I should be able to bring one with me to Chicago in Oct. Oooh... a new deadline :) (for a milestone)

 

-M@

 

Is there a show in October in Chicago? I only live about an hour from there and would be interested to see your project in person!

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Is there a show in October in Chicago? I only live about an hour from there and would be interested to see your project in person!

 

Saturday October 14th at the Evanston Public Library in Evanston, IL, from 9am to 4pm. This is the annual Chicago TI User Group Fair. There is an informal get together around 6pm at Nevin's Pub on Friday night in front of the Holiday Inn in Evanston and a bar crawl after the Fair on Saturday night where the discussions continue :) Hope you can make it!

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Saturday October 14th at the Evanston Public Library in Evanston, IL, from 9am to 4pm. This is the annual Chicago TI User Group Fair. There is an informal get together around 6pm at Nevin's Pub on Friday night in front of the Holiday Inn in Evanston and a bar crawl after the Fair on Saturday night where the discussions continue :) Hope you can make it!

 

I appreciate the information and plan on attending.

 

Thank you!

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