Will Texas Instruments TMS4164-15NL work on an XL/XE?

[ACML]

Even though they are 64Kx1 DRAM, I think the answer is no because they appear to have 256 cycle (4ms) refresh verses the 128 cycle (2ms) refresh. Would that be correct?

Edited January 16, 2018 by ACML

[Rybags]

Longer refresh time means it's more tolerant to less frequent refresh cycles.

 

Supposedly we get a row increment each refresh cycle which means in normal usage there should be a complete 128 rows done about every 1200 cycles.

1 ms is about 1790 NTSC or 1770 PAL cycles so we should be satisfying the requirement for those DRams by better than double.

Edited January 16, 2018 by Rybags

[ACML]

Longer refresh time means it's more tolerant to less frequent refresh cycles.

 

Supposedly we get a row increment each refresh cycle which means in normal usage there should be a complete 128 rows done about every 1200 cycles.

1 ms is about 1790 NTSC or 1770 PAL cycles so we should be satisfying the requirement for those DRams by better than double.

I tried them on an Intec 48K board for a 400 and had no luck. They replaced some MT4264s. I could not get the 400 to show anything, just black screen. Any ideas on why TMS4164-15NL wouldn't work in this application?

[NISMOPC]

I've used those on 65XE's with great success. Bought them on ebay NOS.

 

Here is one of the units I fixed replacing the mT units with sockets and TI chips....

 

Original non-socketed mT DRAM

 

NOS socketed TI RAM

 

[NISMOPC]

I tried them on an Intec 48K board for a 400 and had no luck. They replaced some MT4264s. I could not get the 400 to show anything, just black screen. Any ideas on why TMS4164-15NL wouldn't work in this application?

Found this on another thread regarding what you did:

 

- 4264 is 65Kbit all right, but organized as 4x16K, not 1x64K like the 4164

- 4264 is backward compatible with the 4164 but the 4164 is not upward compatible.

 

That would be why it did not work.

[manterola]

My 65xe with eci included TMS4164-15NL. I got additional ones from eBay to transform my 65xe into 130xe.

[ACML]

Found this on another thread regarding what you did:

 

- 4264 is 65Kbit all right, but organized as 4x16K, not 1x64K like the 4164

- 4264 is backward compatible with the 4164 but the 4164 is not upward compatible.

 

That would be why it did not work.

Thanks! That explains it. Also good news since I have TMS4164s and they will work on my 1200XLs. Luckily, I bought the right kind.

[ClausB]

No that's not right. 16Kx4 DRAMs have 18 pins so they would not even fit. The 64Kx1 DRAMs with 256 cycle refresh will work in an Atari with the newer ANTIC chip (part number starting with CO2). Many XLs and most XEs have that but most 400s don't.

[ACML]

No that's not right. 16Kx4 DRAMs have 18 pins so they would not even fit. The 64Kx1 DRAMs with 256 cycle refresh will work in an Atari with the newer ANTIC chip (part number starting with CO2). Many XLs and most XEs have that but most 400s don't.

None of my 1200XLs have the newer C021697 ANTIC. They are all C012296 ANTICs. So you are saying that a 64Kx1 with a 256 cycle refresh needs the newer CO21697 ANTIC? Can I put a new ANTIC in a 1200XL or 400 without additional modifications?

[Rybags]

Supposedly the newer Antic should be fine as the extra refresh bit just gets ignored so the refresh pattern should be the same.

[ACML]

Supposedly the newer Antic should be fine as the extra refresh bit just gets ignored so the refresh pattern should be the same.

So if its still the same refresh pattern, then the TMS4164 with 256 refresh won't work on a 1200XL with either ANTIC?

[Rybags]

256 row refresh supposedly would want a newer Antic.

 

Possibly it would work in normal circumstances since A0-A7 supply the row address and normal program execution and graphics might make up for the shortfall.

But something like a blank display and tight program loop could see a situation where the extra rows miss out.

[ClausB]

IIRC the 1200XL doesn't multiplex A7 into the row address, so the newer ANTIC won't help there. I'm away from my notebook, so I'm not sure of that. I am sure the 800XL does it correctly.

 

I don't know how the 400 Intec board does it, so a newer ANTIC might help there.

Edited January 17, 2018 by ClausB

[Rybags]

It does from the schematic 1200XL_3 that I've just looked at... would have to anyway otherwise how could it access the full 64K?

 

I thought the 600XL was the only XL that by default uses just the 7x7 R/C matrix for internal RAM?

Edited January 17, 2018 by Rybags

[ClausB]

I think it put A0-A6 and A14 on the row address, but maybe only in the early version?

[Rybags]

Could be... but is there a definitive way to know early vs later 1200XLs? Possibly the slight OS variation detectable in the Atari logo screen?

[+DrVenkman]

Could be... but is there a definitive way to know early vs later 1200XLs? Possibly the slight OS variation detectable in the Atari logo screen?

I have a late-May 1200XL (made in Sunnyvale oddly - my two April units were made in Taiwan). It still has a Rev 10 OS. In fact, I remember only one unit someone here at AA has posted about in the last year or two that had a Rev 11 OS from the factory.

[ACML]

I have never seen a Rev 11 OS come from the factory. I had only one unit with Rev 11 that I bought from eBay, but it was updated by the owner. I sold that unit to an AA member.

[ClausB]

My notebook confirms that whatever version of 1200XL I probed back in the day is missing A7 from the row address, so it won't work with 256-row-refresh DRAMs. Rybags said that version 3 would work with the newer ANTIC, so let's conclude that version 1 and maybe 2 won't. Which version do you have?

Edited January 21, 2018 by ClausB

[_The Doctor__]

waiting for a half dump on possible rev 16 project prom possibly found in proximity to a 1200XL

Edited January 21, 2018 by _The Doctor__

[ACML]

IIRC the 1200XL doesn't multiplex A7 into the row address, so the newer ANTIC won't help there. I'm away from my notebook, so I'm not sure of that. I am sure the 800XL does it correctly.

 

I don't know how the 400 Intec board does it, so a newer ANTIC might help there.

What's weird is that the INTEC 48K board uses Micron MT4264s? The 400 all had the 7 bit refresh ANTICs.

Edited January 22, 2018 by ACML

[ClausB]

Found photos of the Intec 48K board and saw that A7 is not in the row address, so that board needs 128-refresh-cycle DRAMs.

[ACML]

Found photos of the Intec 48K board and saw that A7 is not in the row address, so that board needs 128-refresh-cycle DRAMs.

I thought Micron MT4264s were 256 cycle (4ms) refresh?

Edited January 23, 2018 by ACML

[ClausB]

Yes, that's what the datasheet says. Do they work in the board?

[ACML]

Yes, that's what the datasheet says. Do they work in the board?

I have two INTEC 48K boards and they both have MT4264s. That's OEM original manufactured in ~1983. Lot numbers on the MT4264s are 247 and 248.