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To infinity and beyond... (new hardware)


Spaced Cowboy

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they aren't saw tooth but rounded,

this is done to defeat skewing of the inputs, so they are of the same length... there are a multitude of benefits, but you have got to be careful because they can become antennas... this technique when done correctly assures timing will stay spot on amongst other things..

 

oh sure kyle, you wanted to beat me to it... :) here are some links to further the broader picture and multiple reasons... pro and con...

 

https://electronics.stackexchange.com/questions/74789/purpose-of-wave-shaped-pcb-traces

http://www.ultracad.com/mentor/mentor%20signal%20timing2.pdf

 

fun stuff.

Edited by _The Doctor__
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Still here ? Zoom in, I dare you :)

 

 

90 degree trace turns, kind of wish I didnt zoom in

 

at a 10,000 foot level signal wise they are bad in part due to eddy currents, production wise (if one was to start making thousands of these things) the corners have a great chance of peeling up

 

on a personal note, I would have put teardrops on those super tiny traces going to though hole parts and the inset route of the PCB under the SD card will have rounded internal corners, I doubt it matters much in this situation but I have pointed that out to other people where they are making a cart board (for instance) to fit in a shell and its not going to work putting square plastic in oval slots :)

 

I dunno how mission critical my above comments are (and I assume you will have planes) just my brain twitching into "we will make 450,000 of these and feed them to robots" mode

 

post-35237-0-22039000-1537746311.jpg

Edited by Osgeld
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It looks fantastic! All the serpentine routing indeed makes your brain hurt ;)

 

May I ask, which software do you use?

 

All the design work is done in Eagle - I've been using it now for about a decade and even though it has its foibles, I'm used to them by now.

 

Generally I route "important" signals by hand - things like power planes, power entry, differential pairs, clocks and busses and then let the autorouter take over and do "the rest". On this project, however, I started to hit a serious wall where the autorouter would take ~8 hours or so just to get to a position where it couldn't route any more traces, and there were still dozens to go. Finishing off an autorouters's job isn't a fun task... The main problem is that Eagle's autorouter is a grid-based autorouter, so to get high-resolution routing across a large board, it has an enormous problem-space to solve. So I started to look elsewhere. I asked around at work and they all use Specctra (which of course is licensed in the tens of thousands of dollars per seat per year) so that wasn't a go. There is however an autorouter that is very similar in design to Specctra, called Electra. The interface isn't as slick as Specctra, and I've been working through some rough edges with the developers with the Eagle integration (who've been excellently responsive, by the way) but it's a fixed-cost per permanent licence. My usual boards are 4-layer, but this needs 6, so they came up with a halfway-house between the "total pro" and "semi-pro" that had the 6 layers but didn't include auto-routing of high-speed differential pairs. After a month or so of testing, feedback, and updates I went for the Pro-6L option.

 

Electra is not grid-based, it's shape-based, so it only takes about 10-15 minutes to run a full autoroute, with high-speed serpentine routing based on net-classes, and it's scriptable, so I write a ".do" file that decides how the autorouter will behave...

unit mm
bestsave on
rule pcb (width 0.101600)
rule pcb (clearance 0.101600)
rule pcb (clearance 0.304800 (type via_area))
rule pcb (clearance 0.101600 (type wire_smd))
rule pcb (clearance 0.304800 (type wire_area))
bus diagonal
fanout 5

circuit class sdram (match_net_length on 10)
circuit class sdram (length 100 90)

circuit class lcd (match_net_length on 10)
circuit class lcd (length 100 80)

circuit class cclk50 (match_net_length on)
circuit class cclk50 (length 80 60)

circuit class qspi (match_net_length on)
circuit class qspi (length 20 15)

circuit class xspi5 (match_net_length on)
circuit class xspi5 (length 90 80)

circuit class xspi6 (match_net_length on)
circuit class xspi6 (length 110 100)

select class clock
route 10
protect selected


select all nets
route 20
clean 2
route 25 16
clean 2

filter 5
recorner diagonal
unit inch
recorner diagonal 1 1 1
recorner diagonal .1 .1 .1
recorner diagonal .006 .006 .006
recorner diagonal .003 .003 .003
gloss

report status
unprotect all wires
write script {xio2.scr}

(I'm still learning this, I'm sure there's still lots to explore - you can set up "fences" for the router so that classes of nets are routed only within that fence, for example)

 

... and tell it to have at it. A while later, I have a file "xio2.scr" that I can run from within Eagle, and it will create Eagle equivalent of the autorouter model.

 

Anyway, I think Electra's great. I love the results it gives, and that it's not subscription based. It's a big cost straight-up for me, but I can use it in its current form from now on, and the support is fantastic.

 

 

Yeah, I'm curious what the point of all the saw-tooth routing is about. I could make some wild guesses, but I'd most likely be wrong.

 

 

So, when you've got a signal running at 100 MHz, you have a finite time within which you can recognize the signal as high or low before the next bit comes along (about 10ns at 100MHz in fact). Within any given 10 nanoseconds, there will be a fraction of it called the setup time, and a fraction of it called the hold time, thus:

 

58_1186817796.gif

 

generally centered around a clock signal, so you basically want to make sure that all the data line values are in-place and steady within that time period of the 'setup time', then the clock transitions from high to low (or vice versa), and they have to remain steady for the 'hold time'. All well and good.

 

Here's the catch: It takes the electrical signal a certain time to travel down the wire, so if you have (like I have for example) 32 different data lines, 15 address signals, and various other signals (clock-enable, read/write, row-address strobe, column address-strobe etc.) then it's important that *all* these signals arrive such that they satisfy the setup and hold times for the chip at each end.

 

The only real way to control this is to make the lengths of each signal very similar (they don't have to be identical, there's a range of time over which it'll all work) but this is complicated by the fact that the pins on each chip (in my case the STM32H7 and the SDRAM chip) are all in physically different locations (for obvious reasons) so the distance between them is already different for each signal, and the density of the pin layout means that some signals will be naively routed far and away from all the others, just to *make* the connection, let alone make it under any constraint.

 

So you end up with a lot of signals that need to be extended in some way in order to make their path longer, because you have to route some signals over long paths, and you can't make the distance for some signals be too different from the distance for other signals - hence the serpentine routing.

 

For what it's worth, the EE team at work recommended that I try to achieve 0.5% of a wavelength as the maximum disparity between signals on the same bus. At 100 MHz, the wavelength is ~3m (meters), so 0.5% of that is 1.5cm. That's actually a surprisingly tough target. When challenged, there was the typical "suck air in between teeth, shake head, and say "well, I don't know, if I were you I'd stick to that" response :) )

 

Currently, out of 43 signals, I have 4 where the largest disparity from CLK is not hitting that target, so there's still a little work to do. The two largest busses are the VGA (actually the LTDC bus) and the SDRAM; I intend to relax the VGA constraints a lot to help the SDRAM hit their target - it's far more important that the SDRAM has no data-errors than a pixel on the VGA is momentarily very slightly different ...

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90 degree trace turns, kind of wish I didnt zoom in

 

at a 10,000 foot level signal wise they are bad in part due to eddy currents, production wise (if one was to start making thousands of these things) the corners have a great chance of peeling up

 

on a personal note, I would have put teardrops on those super tiny traces going to though hole parts and the inset route of the PCB under the SD card will have rounded internal corners, I doubt it matters much in this situation but I have pointed that out to other people where they are making a cart board (for instance) to fit in a shell and its not going to work putting square plastic in oval slots :)

 

I dunno how mission critical my above comments are (and I assume you will have planes) just my brain twitching into "we will make 450,000 of these and feed them to robots" mode

 

attachicon.gifcid-logo.jpg

Well, I'm sure being a member of the PCB designer's council you'll have a lot more knowledge about this than I - I'm just a software guy and I'm certainly willing to be educated if I'm wrong, but I was under the impression that 90-degree cornering was more of a religious thing than actually having any practical impact, especially at the frequencies we're talking about (top-end of 100 MHz). There's several places on the 'net that basically debunk the whole idea based on experimental data measurements (see http://www.thehighspeeddesignbook.com, chapter 25, for example).

 

Teardrops are a good idea, thanks :) I'll have to see if I can tease those out of Eagle somehow - actually apparently there's an ULP called teardrops.ulp which will do just that. The inset I'm not bothered about, it's only there to aid removal when pulling the card out with a finger.

 

As for run numbers, well, currently the projected run is ... 5. Just 5. If all goes well, and those 5 perform acceptably, then the next run will be much larger, maybe 50, with different people getting them based on demand. If things go unbelievably well, then there may be *another* run of 50. Or not.

 

And yes, there's a full ground plane, a full power plane, a mixed signal/power plane (where the power is point-to-point and of different voltage) and then there's another 3 signal planes.

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the biggest practical inpact I have seen is in really high frequencies like ghz range, high power applications (which this is not) and board production quality, as in traces shorted cause it didnt fully etch the inside corner, that has actually bit me once at a tune of about 8 grand (not my money of course heh)

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um finish line needs exacto knives and repair mask? runs and hides. :o

I am not a fan of right angle traces in all honesty. The nature of electrons and the field generated by them in nature do not like it, rounded 90 degree elbows are nice and don't hurt the field or flow so much. Kind of strange how it all starts to looks like wave guides at some point in my head...

 

now what gets crazy is real world testing... bend wire at super sharp 90 degrees and is gets more resistive... but form the metal with the 90 degree angle in it and it doesn't... the bent metal is spread apart as it is stressed and bent... the formed metal isn't...

 

the curved line is less likely to transmit though but the right angle can allow jumping of the ship so to speak...

 

this all takes me back to high school. thoroughly enjoyed this if I am remembering things the way I should...

Edited by _The Doctor__
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um finish line needs exacto knives and repair mask? runs and hides.

 

 

well it was a prototype pile of boards, most of the expense was reordering 50x 380mm by 110mm on a 3 day turn

 

dem early day's, I found out and I almost threw up, boss told me "least its not a 80,000$ mistake"

 

anyway back on topic, didnt mean to derail there

Edited by Osgeld
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The majority of the traces are in fact 45-degree. Those that aren't are often inner layer and generated by the autorouter. I've sent off a support request about how to avoid them, but I suspect it's more repetitions of the 'recorner' command above.

 

I'm reasonably certain, though, that to an electron, a 4-mil trace is approximately ginormous, so the corner of the trace being sharp oughtn't matter at that scale. I'm paying for the high-res solder masking (0.1mm), so I ought to get decent etching. I guess we'll see, depending on if there's things I can do to remove them anyway.

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autorouter, bless your heart

 

anyway solder masking has nothing to do with the copper etching, its the same process one might go though at home, you have bare FR4 which is laminated with copper, masked with your copper layers, etched chemically then solder mask is applied on top to keep the molten solder from moving around (too much)

 

stuff happens in the etch process and that inside corner of a (square) 90 is going to be the very last thing that's going to be eaten away and it may just be a blemish, it may short vcc to ground, it may screw up one bit on a buss that drives you friggin nuts

 

or it may never happen .... something may happen and good luck or nothing may happen though the entire life of the PCB

 

I am not saying rip up your entire board and start over, just pointing out that the deck is tilting a card or 2 away from your favor :)

Edited by Osgeld
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autorouter, bless your heart

There's no way I'm doing that board by hand. Quoting from above: generally I route "important" signals by hand - things like power planes, power entry, differential pairs, clocks and busses and then let the autorouter take over and do "the rest". I'm aware that some consider that heresy [grin]

 

anyway solder masking has nothing to do with the copper etching, its the same process one might go though at home, you have bare FR4 which is laminated with copper, masked with your copper layers, etched chemically then solder mask is applied on top to keep the molten solder from moving around (too much)

 

stuff happens in the etch process and that inside corner of a (square) 90 is going to be the very last thing that's going to be eaten away and it may just be a blemish, it may short vcc to ground, it may screw up one bit on a buss that drives you friggin nuts

 

or it may never happen .... something may happen and good luck or nothing may happen though the entire life of the PCB

 

I am not saying rip up your entire board and start over, just pointing out that the deck is tilting a card or 2 away from your favor :)

Fairy nuff - as I said I've asked how to mitigate it. The vast majority of the autorouter routes are in fact cornered at 45 degrees. I'm kind of wondering why the ones that aren't, aren't.

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dunno, autorouters are dumb

 

at work we use Altium Designer, a stupid seat for that probally cost as much as my turd of a car is worth. Last time I let it autoroute something it put a power rail off the freaking PCB

 

(edit then proceed to complain about it when it did its live DRC)

 

:?

Edited by Osgeld
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dunno, autorouters are dumb

 

at work we use Altium Designer, a stupid seat for that probally cost as much as my turd of a car is worth. Last time I let it autoroute something it put a power rail off the freaking PCB

 

:?

 

 

So far ... nothing like that has been the case [grin].

 

The autorouter gets to write a script that Eagle then runs. Once that's done I click on DRC to see if there's anything wrong. Traces that veer too close to the edge would definitely trigger warnings.

 

The autorouter does in fact (currently) give me a board that doesn't pass DRC, but that's because I gave it a board which I'd partially routed, and specified specific trace widths to force characteristic differential pair impedance - and then the autorouter hadn't noticed that and ended up placing a via too close to that trace. So currently after I've run the router, there's a little patch-work to do.

 

What is cool, though is that the developer has been working back and forth with me for a little while now, trying to figure out where exactly the problem lies, there's three possibilities

 

- The script that Eagle runs to convert its board to DSN format

- The autorouter logic itself

- The script that is generated to make Eagle duplicate the autorouted result

 

It'll get there. And all the support is free :)

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  • 1 month later...

So it's been a while since I posted on here, a combination of waiting until the yearly bonus came through, and having to alter the schematic to replace some parts that are no longer "in-house" for Seeed's PCBA. I actually couldn't find the thread by clicking on the page, I had to do a search...

 

Still, at last the dirty deed is done. The board has been sent off, hopefully it'll pass gerber review (they don't provide templates for 6-layer board, so I sort of extended the 4-layer template) and hopefully they'll start production soon - all the components on the board are sourced via seeed themselves, so there ought to be no waiting for the distributors to deliver to seeed.

 

This is one of the larger projects I've personally done, so I wrote a PHP script to parse the BOM, check for parts that ought to be the same type and aren't, and filter out any with a NOSTUFF attribute. It also caught where I hadn't assigned a part-to-place. Doing this meant more work on the attribute management, but it cut down on the number of different parts needing placement, which was a bonus. During all of that, I noticed that my resistor-based DAC for VGA output was actually more expensive than the corresponding Analog Devices IC, because of the large number of different resistors etc. Placement costs add up - so I replaced it with the ADV7125...

 

Now to sit back and wait :)

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Now that I have the BOM and board, I thought I'd make a couple of passes through the pricing system to give an indicator of costs at volumes.

 

Assuming a volume of 50 units, the cost comes to ~$290 per fully populated board.

Assuming a volume of 100 units, the cost comes to ~$193 per fully populated board.

 

These are all Seeed's prices. MacRorie has also mentioned that he can do assembly, and there are other board-houses out there to try and reduce costs, but this gives a ball-park figure.

 

On top of this you'd want to add a PSU (Amazon sell them for $18 or so) and probably a case (which I'm targeting about $30 IIRC - it's in the back pages of this thread)

 

Of course, this is all very premature, there's a long way to go before any sort of ordering thread will be viable, assuming the board even works! But it's good to set realistic expectations about price, and let me get in there pre-emptively and say that I do understand that it'll be too steep for some people. If it's any consolation, I've just coughed up for 5 boards at $590 each...

 

Cheers

Simon

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100 unit run is a no brainer, you definitely need to get some exposure on the forums and retro / collector / hack sites. You might exceed a 100 doing that. You have to move on it for the holidays though... :)

timing matters... lol not pun intended

Edited by _The Doctor__
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  • 5 weeks later...

So Seeed have made the PCB and sent through their list of questions for placement, where I wasn't sufficiently clear on how orientation was supposed to look like. I thought it might be slightly interesting to show the board at the point at which they are at, though I'll get a better pic when the boards arrive :)

 

Here's what we have:

 

seeed-fixes-1.jpg

On a totally different note, I was looking at this and if I could find some decent reviews of it, I might be tempted to spring for it as a Christmas present (to myself :). Combining that with the magic-box (which admittedly doesn't work as well on PLA, but would hopefully have some effect) and I could create the cases, in perfect custom colour, myself. I'm finding it hard to persuade myself to spend so much money, though, when I can't find any decent reviews of the machine other than press-releases...

 

Anyway, that's where we are, the chips appear to be the right way around on the board this time :) They're almost done with placement, and hopefully the boards will be winging their way towards me soon...

 

Simon.

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So Seeed have made the PCB and sent through their list of questions for placement, where I wasn't sufficiently clear on how orientation was supposed to look like. I thought it might be slightly interesting to show the board at the point at which they are at, though I'll get a better pic when the boards arrive :)

Nice!

 

On a totally different note, I was looking at this and if I could find some decent reviews of it, I might be tempted to spring for it as a Christmas present (to myself :). Combining that with the magic-box (which admittedly doesn't work as well on PLA, but would hopefully have some effect) and I could create the cases, in perfect custom colour, myself. I'm finding it hard to persuade myself to spend so much money, though, when I can't find any decent reviews of the machine other than press-releases...

 

Anyway, that's where we are, the chips appear to be the right way around on the board this time :) They're almost done with placement, and hopefully the boards will be winging their way towards me soon...

 

Simon.

I have their Da Vinci Pro v1.0 or 1.1. Take aways are the expensive replacement parts and filament. You will be locked into their filament. :( I would definitely spring for Simplify3D program when they support this version of the printer. Much....... better software. ;-)

 

If you aren't going to be printing with ABS, I'm not sure why you are contemplating the Magic Box. :?

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Nice!

Yup, it's been a long haul, I'm really looking forward to getting them in my hands.. I think they're supposed to be shipped on Dec 7th.

 

I have their Da Vinci Pro v1.0 or 1.1. Take aways are the expensive replacement parts and filament. You will be locked into their filament. :( I would definitely spring for Simplify3D program when they support this version of the printer. Much....... better software. ;-)

 

If you aren't going to be printing with ABS, I'm not sure why you are contemplating the Magic Box. :?

 

I have Simplify-3D for my original 3D printer, but it's not going to support the colour 3D-printer just yet - maybe the next version :)

 

I've asked the site-admin at forum.xyzprinting.com to get me access to the "invite only" Da Vinci Color forums, we'll see.

 

I knew their parts/consumables were expensive, but the filament is easy to hack (*cough* Hackaday *cough*), though unfortunately that wouldn't really help in this case because I don't know anyone else who sells the colour-absorbing PLA, or the inkjet refills. If I go this route, I have to accept that I'll be paying through the nose for consumables.

 

I actually already have a Magic Box, and it does work on PLA, but to a lesser extent. You don't get the glossy look that you get from ABS, but it does smooth out some of the surface detail on the end-product.

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  • 2 weeks later...

So the board came back from Seeed last night, looking a bit like:

 

board-back-from-seeed.jpg

 

I say "a bit like" because the above is the fixed board. They did it again! They managed to get one of the chips the wrong way around...

 

[backstory]

I plugged in the 5v supply, and the three LEDs lit up to show that 1.0v, 1.8v and 3.3v were all being supplied. All well and good, I thought, but I got the multimeter out and checked...

 

1.0v ... good, measuring 1.003v

1.8v ... good, measuring 1.801v

3.3v ... wtf, measuring 4.3v SWITCH IT OFF. NOW!

 

(ahem) so I was curious what I'd done wrong with the PSU circuit for 3.3v, I went back and checked it against the webench design from TI, and it all seemed to check out. I'd used replacement parts for some components due to availability, but it still seemed like it ought to work. I decided to wait until today when I could chat with the EE's at work. So today rolls around, and we link the board up to a nice variable bench supply, the 3.3v line is acting like a diode... No matter what voltage you feed in, you get input-voltage minus 0.7v out the other end. This is to say the least, confusing. It's supposed to cope with an input of 3.4v to 5.9v and still produce 3.3v. out comes the magnifying glass, and I bring up the board-layout. Yup, the chip is rotated by 180 degrees, it's amazing it didn't just blow.

 

Anyway, I got the very nice lab manager (Janet) to de/resolder the chip for me, and we're in business.

[/backstory]

 

So, now I have 3.3v coming out the regulator, well okay 3.295v :) I was worried that some of the main chips may have died - so plugging in the debugger to the ARM core, I could connect via the SWD interface and read/write to the SRAM on the chip. That's a good sign...

 

talking-to-the-cpu.png

I also did a quick check on the JTAG connectivity to the FPGA, and that seemed to pass as well. My version of Vivado is too early to know about this particular chip, but it successfully probed the chip, got the chip-id, and said it had found an unknown device on the JTAG chain. I'm downloading the latest version of Vivado as I type, and once that's installed, I'll check it identifies the chip correctly, but it looks good right now...

 

[update] I've installed Vivado 2018.3 now, and it recognizes the chip via JTAG :)

 

xc7s25-found-via-jtag.png

[/update]

 

I'll get Janet to re-orient the 3.3v regulators on the rest of the boards before I power them up, just in case, but so far, so good :)

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I sure hope SEEED is eating it on the mistakes they are making!

They gave me a complete refund the first time around. I haven't got in touch with them yet, but I will do this weekend. It's pretty fortunate that (a) the voltage regulator didn't blow up, and (b) that the major chips (the FPGA and the ARM chip) didn't let the magic smoke out. The "absolute maximum" ratings for both chips are less than 4 volts...

 

With pcbway they always send a picture before finishing assembly to confirm the orientation. Perhaps ask Seeed if they can do that before shipping?

Seeed did too - see post #133 above, but they didn't highlight the voltage regulator as a problem, and their photo was a bit fuzzy. Having said that, it is possible to see the pin-1 dot in the lower-left corner when it ought to be upper-right. I did check the SDRAM, ARM, FPGA etc. But I missed the 3.3v regulator.

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I'm not sure if this is worth a post from the not-me perspective, but it's a big deal for *me*, so :)

I got SW4STM32 up and running, with openocd debugging configured, so I can code in Eclipse (which isn't my favourite IDE, but it's tolerable). What it does get me is a graphical interface to gdb, letting me interactively single-step through code running on the STM32H7 on my board. As an embedded developer by trade, this is one of those "thank ${deity} it works!" moments :) Sure, you *can* use gdb/lldb from the commandline, but it's much nicer to have all the information presented in the UI...

running-gdb-to-arm.png


I was a bit concerned because I usually use a work-provided debugger which properly handles the NRST signal, but the standard ST-Link hardware doesn't do that. Fortunately there's an option in SW4STM32 to do a software-reset rather than rely on hardware, and this worked on my STM32H7 chip. You need the reset to do the flash programming, so it's kinda important.

This way, once you have a board, and have git-cloned the repository, anyone can update the firmware and flash it down to the board using free-to-use open source tools, and the cheap ST-Link2 programmer with a 20-10 way adapter.

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