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TI-99/4A Timing Captures


Tursi

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With my cart finally working, I was finally able to run my own video conversions on hardware, where they are a bit slower than I'd like (roughly 10% slower than they should be). Since I've known for a long time that Classic99 is missing "something" in its timing, I've always meant to get back to the logic analyzer someday and start measuring performance.

 

Someday was today.

 

This Google doc captures my tests and analysis. I was interested in verifying memory access cycles, particularly for previously unknown (to me) peripherals like the sound chip. (Spoiler - it's slower than GROM...) This will allow me to improve the accuracy of Classic99's timing so I can tune my video player to run correctly on hardware.

 

Specifically I measured read and write to:

 

- 16 bit RAM

- 8 bit RAM

- VDP

- Sound

- Speech

- GROM Address

- GROM Data

 

https://docs.google.com/document/d/16seTZczVk_We9FNbwMp2q5hLOKgwkVJitHrRKoH4VAo

 

If you'd like to look at the actual captures, you can use the LogicPort software in demo mode (http://www.pctestinstruments.com/) and open the attached files.

 

TI_Access_Timing_LogicPort.zip

 

Enjoy!

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I found a TI-99/4a at a local thrift store still in the box for $32 a few month back, it was in good shape, I hated to walk away from it so now I'm a TI owner... Been doing online research on it ever since... This will be very helpful; thanks Tursi.

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Wow! Thanks for capturing all that... That is going in the study guide. :)

 

So, if I understand what you documented correctly, 'Clock' in the diagrams is the PH1 input on the 9900?

Sorry about that, yes. I changed my clock measurement a lot of times to try and make the signals line up better, and when I finally settled I forgot to update the docs. I've fixed that.

 

... it might actually be PHI2. I went back and forth a number of times... I guess to that end don't put too much stock into the exact phase -- I was after counts. (It's definitely not 3 or 4.) It's all disconnected now and since I didn't update the docs, that makes me doubt this morning.

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Thanks for verifying these timings. I was especially interested in what you observed for the sound chip.

 

One detail some might want elaborated: When the sound chip SN76489 takes READY low for 32 of its cycles, those are counted at 3.579MHz, or the equivalent of 26.76 cpu cycles at 3 MHz.

 

Tursi recorded 27 cycles, and I guess sometimes plus one?

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One detail some might want elaborated: When the sound chip SN76489 takes READY low for 32 of its cycles, those are counted at 3.579MHz, or the equivalent of 26.76 cpu cycles at 3 MHz.

Tursi recorded 27 cycles, and I guess sometimes plus one?

Ahhh.. that's where the difference came from. Forgot about the clock rate there to the sound chip.

 

The CPU can't have half of a cycle of HOLD, so I'd expect the 26.76 to usually round up. I can see it sometimes missing the hold point and maybe making 26 cycles, but I don't think 28?

 

Many signals don't line up nicely with the clock, and worse is that the CPU clock and the VDP-derived clocks are completely unsynchronized. This sometimes made counting tricky and so I looked at a number of cycles to see how consistent it was.

 

I didn't worry about a single CPU cycle difference overall, since the potential CPU clock speed between two different consoles is greater than the slip of one cycle in 30. (The datasheet allows a tolerance of +/-5% on the clock, and I've measured consoles at both extremes. Conversely the VDP clock, which generates the sound and GROM clocks, has a much tighter tolerance in order to generate video correctly.)

 

I suppose this technically means that for access to the sound chip and GROMs, you might see differences of +/-5% depending on the console. The console I tested on was measured very close to 3MHz (IIRC it was showing around 3,000,100 Hz. I only remember because I was surprised how close it was.)

 

All told, though, it is one person's measurements of one system. It's not fact unless someone reproduces it. ;)

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  • 5 months later...

Ahhh.. that's where the difference came from. Forgot about the clock rate there to the sound chip.

 

The CPU can't have half of a cycle of HOLD, so I'd expect the 26.76 to usually round up. I can see it sometimes missing the hold point and maybe making 26 cycles, but I don't think 28?

 

Many signals don't line up nicely with the clock, and worse is that the CPU clock and the VDP-derived clocks are completely unsynchronized. This sometimes made counting tricky and so I looked at a number of cycles to see how consistent it was.

 

I didn't worry about a single CPU cycle difference overall, since the potential CPU clock speed between two different consoles is greater than the slip of one cycle in 30. (The datasheet allows a tolerance of +/-5% on the clock, and I've measured consoles at both extremes. Conversely the VDP clock, which generates the sound and GROM clocks, has a much tighter tolerance in order to generate video correctly.)

 

I suppose this technically means that for access to the sound chip and GROMs, you might see differences of +/-5% depending on the console. The console I tested on was measured very close to 3MHz (IIRC it was showing around 3,000,100 Hz. I only remember because I was surprised how close it was.)

 

All told, though, it is one person's measurements of one system. It's not fact unless someone reproduces it. ;)

 

Thanks again for gathering all this.

 

I am reproducing some of the measurements. Out of necessity: I'm debugging my sidecar. I was startled to see MEMEN go low for 10 us (microseconds) until I realized it was a write to GRMWA. As your timing explains, it really is that big a chunk of time.

 

As to how a human being can be startled by a 10 us long event... being alive is pretty amazing.

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