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bB Bankswitching Under the Hood


Karl G

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If I were wanting to perform a bankswitch "manually" from ASM code in the same way that bB does it, what would I need to do? I'm guessing that it varies by ROM size and kernel. My specific interest is to jump to a different bank that has more room when running a minikernel for the DPC+ kernel.

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In the non-DPC+ I'd guess you'd modify the score_graphics.asm

http://atariage.com/forums/topic/221100-bb-256k-128k-64k-32k-multikernel-frameworks/

 

DPC+ would probably involve being as knowledgeable in DPC+ and batari BASIC as the creators. The ROM space taken up seems to be an intentional tradeoff. More available ROM probably means huge rewrites.

 

In a very convoluted way you'd be more personally successful in switching over to SpiceC (when it comes out) or the other ARM assisted C and corresponding boards. Perhaps finding a way to use BCX to convert from BASIC to C.

http://bcx-basic.sourceforge.net/

 

Although my hunch is neither C options come with pre-made kernels like batari BASIC. So, that's a whole 'nother can of worms :)

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I don't think that I was explaining my need well. With the bB DPC+ kernel, there are 6 banks to work with. Bank 1 contains the display kernel, and is almost completely full. Normally with bB if I wanted to make use of a mini kernel, I would put it in the same bank as the display kernel, which for non DPC+ kernels is the last bank. For DPC+, it would instead have to be included in bank 1, which is almost completely full.

 

What I want to do is to include a stub mini kernel in bank 1 that simply switches to another bank, and transfers control to my actual mini kernel.

 

The part that I don't know how to do is doing the bank switch from asm code as opposed to the normal way in bB code. I may be able to figure it out myself via the debugger, and reading up on bankswitching.

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Nah. My lack of knowledge is the main source of confusion here :)

 

Trying to find a workaround as fiddling with DPC+ ARM and batari BASIC kernel assembly is beyond me.

 

Speaking of which: I wonder if a savekey device could be used to store level data so you don't need to change anything in the kernel. Dunno if it works with DPC+

http://atariage.com/forums/topic/176797-bb-atarivox-support-part-1-the-atarivox-eeprom/

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The part that I don't know how to do is doing the bank switch from asm code as opposed to the normal way in bB code. I may be able to figure it out myself via the debugger, and reading up on bankswitching.

If you compile a DPC+ game that does a "goto start bank2" from bank 1, the following code is produced in the assembly file. I've added in some comments for clarity:

 

.L03 ; goto start bank2
 sta temp7
 lda #>(.start-1) ; *** push the ROM address for "start" on to the stack
 pha
 lda #<(.start-1)
 pha
 lda temp7
 pha ; *** save A
 txa
 pha ; *** save X
 ldx #2 ; *** bank #2
 jmp BS_jsr ; *** a copy of this bankswitch routine is stored in every bank

The BS_jsr routine is pretty simple...

 

BS_jsr
 lda bankswitch_hotspot-1,x ; *** hit the bankswitch hotspot.
 pla
 tax ; *** restore X
 pla ; *** restore A
 rts ; *** RTS will "return" to the address we pushed onto the stack earlier
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Thanks! Your comments helped. It wasn't clear to me why A and X were being pushed on the stack, but I get now it's just to make sure their values are not corrupted if they contained anything that would be needed after the bankswitch. If I know that they don't need to be preserved, then I can skip that step.

 

The other thing that confused me was not understanding how it would ever get to the RTS, since that instruction happened after the bankswitch. If the same routine is in all banks at the same relative address, then it would pick up the RTS from the destination bank, then.

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