Troubleshooting ROM test intermittant failure

[SpicyChronos]

I am troubleshooting an 800XL that I am trying to upgrade with a Ultimate 1 Meg board, AVS, and a dual pokey board.

 

First things I did, since I did not know the working status of the computer, so I verified that the power supply had the correct voltage (Chelco) and started the Self Test. I get the 1st bar in the ROM area intermittently passing green, but most of the the time I get the 1st one red and the 2nd one is always green.

 

I checked for solder joints, all the chips are socketed, and reseated them all. The 74LS138 (U2?) had very tarnished pins, so I replaced the socket (new is machined) and the chip.

 

So, I thought it was a bad OS ROM, and swapped it with another one and still got the same results. I have also swapped the GAL chip.

 

I checked voltages when it was on, and it seemed a little low.. 4.92V So I rebuilt the power supply with new rectifier diodes, capacitors, resistors and the big filtering capacitor. I got the voltage now to 5.26V, and see right around 5.17V on various chips.

 

I replaced the OS socket with a machined one, but unfortunately I pulled several pin holes, so I ohmed out using schematics and made a bunch of bodge wires.

 

I still get the intermittant ROM failure of the 1st bar.

 

Does anyone have any suggestions?

 

Thanks!

[Rybags]

Ultimate 1 Meg sees you pulling out the OS and MMU - OS supplies most of the needed address bits and MMU functionality is taken over.

But that said, your fault could be external to the OS Rom and MMU and the likely result if it's something down the line is that you'd get even worse intermittent results given that the U1Meg relies on the OS socket somewhat more than the stock system.

 

Ideal test would be to try the OS and MMU in another machine.  Both can be interchanged with the 600XL.

[SpicyChronos]

I haven't installed the Ultimate 1 Meg upgrade, I replaced the sockets for the OS, U2 and the MMU. I have tried other chips from a working 800XL, and I still get the red bar.

 

What part of the OS is the 1st bar of the ROM test, test?

 

Does anyone know if there are diagnostic program tools to check ROM CRCs, I did get a SIDE 2 cart and tried loading some memory test BIN files on it, and all the memory passes. I tried to add on the SALT 2.05 image, but I can't get it to start.

 

Thanks again.

 

Edited January 12, 2020 by SpicyChronos
fixed names

[Rybags]

I think the first bar should be the low part of the Rom.  $C000-$CFFF, the Floating Point $D800-$DFFF and the Self Test itself which switches in at $5000-$57FF

The OS just uses a 16-bit checksum, fairly simple and quick to calculate.

The Rom itself I believe is ordered OS C000 4K part then SelfTest 2K then FP 2K then OS $E000-$FFFF 8K part.

 

By the description you're giving I'd say it's some sort of addressing issue, maybe a bad pin connection or faulty trace.

The high/low OS selection should be dependent on A13, maybe it's sometimes active when it shouldn't be (possibly residual from whatever previous memory access occurred) - that could explain why only low Rom failure is happening.

 

You could test the theory by just putting in a patch wire from A13 on Antic or the CPU to the relevant pin on the OS socket or chip, though it is a bit of a stab in the dark.

[+Nezgar]

So just to be clear, the U1M has *not* been installed yet, you're just trying to establish a stable system 1st?

 

Maybe a timing issue when accessing the ROM - it would be unlikely for the ROM to be faulty since you've tried 2... Maybe try swapping the CPU , and replacing the 74LS08 with a 74HC08.

 

This is an interesting page about phi2 timing mods, specifically #2 on the page regarding the OS ROM:

http://www.mathyvannisselroy.nl/stabiliz.txt

 

And this page post: https://atariage.com/forums/topic/179729-disturbance-on-screen-using-eeprom-os/?do=findComment&comment=2249689

 

[SpicyChronos]

I figured it out. It was something with timing issues. I swapped out the CPU, and it became stable. I let it run overnight, and still got all green bars and blocks.

 

I'm gonna do the PHI2 stabilizing modifications to help make it rock solid. Then to install one modification at a time, check for any voltage drag, and continue on, until I get it all working.

 

Thanks Nezgar, for the links. They helped out tremendously.

[+Nezgar]

Wow cool, great to hear that helped. Although that means the root issue here was a poor phi2 coming out of the flakey CPU in the first place, you may be perfectly fine without further mods using the replacement CPU. That marginal CPU may benefit from the mods if you still want to try using it somewhere though...

[SpicyChronos]

Yeah, i'll keep the current CPU in there, as it's working. The other CPU, I'll mark it weak timing, for another use. I still have a few other 8-bits I can tinker with. Thank you all for your help.