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CorComp DSDD Disk Controller docs

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I noticed that schematics show two sockets for 2764 EPROMs (8Kx8), but the cards I saw have one 27128 EPROM (16Kx8). It seems to me that the jumpers next to the left socket are used to switch between 8K and 16K EPROMs, right?

 

The MG cards do not have these jumpers. But they have a switch at the edge that seems to select the first or the second half of each EPROM. Does anyone have any information about this and the other switch?

 

 

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The only schematics that I have ever seen (and the actual card in my possession) only have two 2764s designated as bank1 and bank2. I have never seen a CorComp FDC with a jumper for a single 27128 EPROM. The use of a jumper for a 27128 must have been a "user hack".

 

BTW, MG never made any cards - they only provided the upgraded EPROMs to eliminate some of the CorComp routines that took over control of the computer at boot.

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By "MG card" I referred to the redesigned card with MG ROMs.

 

See below

ccorig_pcb_2400.jpg

ccmg_pcb_2400.jpg

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I don't think the top card is a genuine CorComp. No logo and numerous component changes. Any idea where it originated?

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Not my own card, but the top card does have "Corcomp" on its PCB. Look above the dip switch array. It corresponds to the schematic below that Ksarul posted some weeks ago.

DiskController-1.jpg

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I would have to go back and look for the specifics but, CC used two different FDC ICs which may account for the differences you're seeing in the two cards?  Take a look at the IC numbers to verify.  In fact, I have two boards with the daughter boards the plug into the controller socket, which is another configuration.  Evidently they changed to a different IC but the batch was bad so they backtracked on the later board by installing the daughterboard with the previous controller IC.

 

Somebody fact check me!

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There were a lot of random issues with CorComp cards. The first cards used a 2793 FDC chip. There was a serious manufacturing issue with the chip in 1984 and a lot of bad chips made it into the channel before the problem was discovered. I read somewhere that CorComp had about five hundred of the chips on-hand and had to test all of them to find the good chips in the lot. They put the good chips in the first release of the FDC and built the daughter boards to be able to put a 1773 into the same socket, as it was software compatible. They then redesigned the card to use the 1773 by default. Several additional tweaks were made to the design, but it stayed with the 1773 until the end. I put a relatively complete set of schematics up a couple of months ago that shows just about every revision of the boards I've seen in the wild, courtesy of the Ron van Kleunen and items he rescued from his dad's TI collection and dispersed through the community.

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The 9901 also seemed more susceptible to failure on the CorComp cards.  I don't know if this has to do with its direct connections to the PEB bus but that was always the first chip to suspect when I came across a dead CC FDC (and other CC cards with the 9901) that required repair.  Often the customer indicated they had pulled the card too soon after powering down the box or (as I often suspected) pulled/inserted the card with the PEB still on.  This was around the time when people were replacing the loud fans with silent fans, the former being a good reminder that power was still on (and a reason that my test/repair PEB still has the original, loud fan still today!)

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As you may have guessed, I'm about to add the Corcomp controllers to MAME. I plan to implement both 2793 and 1773 versions, but I am still not sure about the meaning of the switches. The "xray image" below shows that the lower switch goes to pin 26 of the EPROM sockets, which is the MSB of the address. That is, you can switch from the lower half of both EPROMs to the upper half of both; that is, you can replace both ROM banks by a second version with this switch.

 

The upper switch has to do with pins 7 and 9 of the PAL U12, which mean A5 and A7. Two more wires are connected to traces for A8 and A10 (right from the right EPROM socket). The picture does not reveal how the wires are connected to the switches.

 

...

 

What short name do you prefer for the cards? We already have "hfdc", "tifdc", and "bwg". My suggestion is "ccfdc" for the original controller, and "ccmgfdc" for the revised version. Or better "ccfdcr"?

PCB_xray.jpg

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Based on your latest information, that configuration would allow for the use of two 27128s and make it possible to have the standard CorComp DSRs and, by flipping a switch or two, also have the MG DSRs installed and available for use as well. I can't see the advantage on real gear since you would have to turn the system off and flip the switch to choose which DSR you wished to use - a bit inconvenient. Usually, the MG DSR was used because the user found the original's performance to be too obnoxious and the enhanced CALLs it provided were a benefit. It was usually a more or less permanent installation.

 

As an aside, I did have (and may still have) a cartridge board that was wired to allow for programming two separate 8K programs into a single 27128. There was a toggle switch that was thrown when the console was simultaneously reset that allowed you to select the bottom half of the EPROM and thus the second program.

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Sometimes, it is worth having a second look at the pictures ...

 

Translation:

- small label: "Button out 1400"

- white label: "Upper button pressed 1100, not pr. 1400" / "Lower button pressed lower block, not pr. upper bl."

 

This looks like a non-standard mod. I guess this need not be included in the emulation.

ccmg_shell_1600.jpg

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Do we have the PAL equations of both variants? I have a file "CC_FDC-REV-A PALS.pdf", but it only describes how the PALs are externally connected; it does not reveal the equations. All PALs are PAL12L6.

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I don't think we have more than one or two PAL equations or dumps. CorComp locked their PALs. I have been trying to put together a PAL repository for TI gear but most will have to be reconstructed from the schematics. Jim has a few and I have a couple but that's about it.

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27 minutes ago, mizapf said:

Do we have the PAL equations of both variants? I have a file "CC_FDC-REV-A PALS.pdf", but it only describes how the PALs are externally connected; it does not reveal the equations. All PALs are PAL12L6.

There was discussion of the pals here some time back, but I have a short lunch and can't find it at the moment.

 

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3 hours ago, RickyDean said:

There was discussion of the pals here some time back, but I have a short lunch and can't find it at the moment.

 

This thread: https://atariage.com/forums/topic/288694-wanted-replacement-pal-chip-corcomp-fdc-1985-rev-a-u12/page/2/#comments

 

I worked out a first iteration of the PAL equations based on the info from Helocast, but it needs someone who can program and re-read the PAL data to check and refine them.

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I just started to implement it. Maybe I can guess the behavior of the PALs. The good news is that the new MAME-implemented Corcomp controller already crashes when I try to load from it. ;)

 

(This is good, as it means that the card survives the power-up, and it is invoked for DSK1. I'd say this is OK for a couple of hours time.)

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By the way, the Corcomp PALs are 12L6, not registered. Their equations should be derivable from going through all input values and watching the outputs. Maybe some readers support this brute-forcing?

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18 hours ago, mizapf said:

By the way, the Corcomp PALs are 12L6, not registered. Their equations should be derivable from going through all input values and watching the outputs. Maybe some readers support this brute-forcing?

Exactly what I done three posts above ...

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Oh, that's great! Thanks! I really should have checked the link before posting.

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I found an error on the schematics of the revised Corcomp controller. The pin labels of pins 26 and 30 of the 9901 are swapped; the lines themselves are correct. Concretely, P11 must be lead back to the PAL U6, while P2 is lead to the READY logic (the 74ls10 circuit, which is also wrongly designated as "LS10").

schem2b.jpg

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