atariry Posted March 5, 2020 Share Posted March 5, 2020 I have just dusted off an old partially started project, my Atari (800) on a breadboard. I have breadboarded Sally, Antic and GTIA and used buffers to allow a FPGA to see the address and data busses. In the FPGA code I generate the "xtal" clock and emulate a 16k RAM and 8k ROM. In the future the idea is to add code to convert the output from the GTIA into HDMI. I am aware of Sophia(?), which I think does something similar, and from memory appears to use a CPLD rather than a FPGA. However I want to implement this myself and add sound over HDMI too. So, I need a binary to load into the 8k ROM. Since Pokey and PIA are missing, I do not want to use the normal Atari ROM. I would like to generate some simple code to initialise the chips and display a simple 40 x 24 line text screen. I have been looking through the Atari OS source code and I have tried to pick out pieces I need, but I haven't ever programmed the custom chips at this low level before. I have also googled (the web and this site) but not found anything helpful. I would simply like to ask if anyone is aware of some assembly source which does initialisation of the various chips from scratch and then possibly creates a display list and initialises ANTIC and GTIA? Perhaps part of a bigger project? Perhaps there are some other older threads in this part of the forum which someone might recall? Note: I don't normally visit this area - so my apologies in advance. Once the project moves forward I will post some pictures in the main 8-bit forum. regards... --Atariry Quote Link to comment Share on other sites More sharing options...
thorfdbg Posted March 5, 2020 Share Posted March 5, 2020 (edited) 1 hour ago, atariry said: So, I need a binary to load into the 8k ROM. Since Pokey and PIA are missing, I do not want to use the normal Atari ROM. The Atari ROM will initialize the chips just fine, and it will attempt to write to the chips, but that does not break the initialization at all. The only part where it fails would be the SIO bootstrap where it attempts to find the bootblock an attached disk. Thus, the easiest way would be just to replace SIO by a dummy that returns an error (Y=$90). Of course, the system would then attempt to advance to the self-test, which it cannot due to lack of PIA. If your memory map includes the self test right away, it would go there - or go to a cartridge if you have a cart ROM in the system. For Os sources, you may want to find an Atari Os compatible source code here: http://www.xl-project.com/downloads.html It builds on Linux, with ca65, if this is of any help. Edited March 5, 2020 by thorfdbg Quote Link to comment Share on other sites More sharing options...
E474 Posted March 6, 2020 Share Posted March 6, 2020 Hi, You could also use the 400/800 OS, replace the SIO handler code with an RTS, and it should boot to the Memo Pad. Quote Link to comment Share on other sites More sharing options...
Rybags Posted March 6, 2020 Share Posted March 6, 2020 From memory I had a problem when I was testing IRQ signals and inadvertantly broke contact between the 6502 and it's IRQ pin in the socket which prevented normal startup. It might be a bit more work than a simple RTS, maybe setting status to 138 signifying timeout/device not present. Quote Link to comment Share on other sites More sharing options...
Wrathchild Posted March 6, 2020 Share Posted March 6, 2020 (edited) What you are doing sounds more closer the 5200 and so I'd suggest taking a look at its ROM routine. I presume the RAM runs from $0000->$3FFF and the ROM from $E000->$FFFF and so the ROM sets the startup/interrupt vectors in the last 6 bytes. The 5200 OS has the Atari logo page and so would be a good starting experiment. The only difference is that instead of the OS looking for the cartridge and using it's init/run vectors, your application code would be in the ROM area instead. Edited March 6, 2020 by Wrathchild Quote Link to comment Share on other sites More sharing options...
Rybags Posted March 6, 2020 Share Posted March 6, 2020 I was about to say the 5200 BIOS is barely that and maybe too simplistic. But the requirements seem to be to just init the system and generate a sample display so the HDMI output can be tested. A sample screen, DList and rudimentary init code with an NMI handler to do VBlank would probably be sufficient. Maybe output some sound also - could just plug the keycode value into AUDF1 for that. 1:30am here, I might see if I can slap something together when it's daytime again. Quote Link to comment Share on other sites More sharing options...
atariry Posted March 7, 2020 Author Share Posted March 7, 2020 Thank you to everyone who has replied. Over the past few days I have updated the Kicad schematic and completed the wiring of all 3 Atari chips (currently no Pokey or PIO). I have also tried to refine my minimal boot, but I am sure that is it incomplete. FYI I have 16k RAM from 0000 to 4000 and 8k ROM from E000 to FFFF. This is emulated by the FPGA, but I have yet to try running the system to find out even if this is working. I used the FPGA as it was easier and quicker than physically wiring up RAM and ROM chips. The FPGA "sees" all address, data and control signals. In theory I could use the FPGA to emulate a Pokey, but for the custom chips I prefer to use real hardware. The end goal is to generate a clean HDMI video stream then wire up the solution to my 130XE whose video is of horrendous quality. Talking about the 5200 which I know has a different memory map to the 400/800, I spotted something which I am sure is well known to Atari experts, that GTIA has a chip select input, so can be anywhere in the memory map, whereas ANTIC already has all 16 address lines, so has the address select range built in. I had to add the address decode for GTIA to the FPGA code. I had a couple of ideas. I guess that I could replace the OS ROM on one of the emulators with my own OS? I think that some of the emulators have debug capability which might be the best way to go. Single step/trace would be ideal. I have rarely used any Atari emulator so have no idea which might be easiest/best. I also considered using an EPROM emulator in my 130XE which I know has a socketed ROM. There's no way of reaching the ROM with the emulator cable inside the 400/800 case. :-) I think that the full OS (even with hacking or adding RTS) is unlikely to work, but will make debugging more difficult. I intend to be using a 32 channel logic analyser to capture address, data, and control in order to determine what is and isn't working. I will take a look at the 5200 BIOS at it sounds like it might be easier to extract the code I require. For example in the 400/800 OS the display list is only setup when the OPEN command is executed and there is a lot os overhead which I don't need or want. --Atariry 1 Quote Link to comment Share on other sites More sharing options...
atariry Posted March 9, 2020 Author Share Posted March 9, 2020 I used the Altirra emulator and replaced the system ROM with my own code assembled into a 16k binary with origin at $c000. Here is the code in case anyone is interested... ; ; Simple initialisation and display list code for ; "Atari on a Breadboard" project ; Uses the AS65 6502 assembler by Frank Kingswood. ; ; 05-Mar-2020 : atariry ; - First write. Add hardware location defines. ; - Start to add custom chip init code. ; 08-Mar-2020 : atariry ; - Add character set definitions. ; - Make sure all writes are to hardware registers. ; ;;;;;;;;; ; POKEY ; ;;;;;;;;; POKEY = $D200 POKEYrPOT0 = POKEY+0 POKEYrPOT1 = POKEY+1 POKEYrPOT2 = POKEY+2 POKEYrPOT3 = POKEY+3 POKEYrPOT4 = POKEY+4 POKEYrPOT5 = POKEY+5 POKEYrPOT6 = POKEY+6 POKEYrPOT7 = POKEY+7 POKEYrALLPOT = POKEY+8 POKEYrKBCODE = POKEY+9 POKEYrRANDOM = POKEY+10 POKEYrPOTGO = POKEY+11 POKEYrSERIN = POKEY+13 POKEYrIRQST = POKEY+14 POKEYrSKSTAT = POKEY+15 ; POKEYwAUDF1 = POKEY+0 POKEYwAUDC1 = POKEY+1 POKEYwAUDF2 = POKEY+2 POKEYwAUDC2 = POKEY+3 POKEYwAUDF3 = POKEY+4 POKEYwAUDC3 = POKEY+5 POKEYwAUDF4 = POKEY+6 POKEYwAUDC4 = POKEY+7 POKEYwAUDCTL = POKEY+8 POKEYwSTIMER = POKEY+9 POKEYwSKRES = POKEY+10 POKEYwSEROUT = POKEY+13 POKEYwIRQEN = POKEY+14 POKEYwSKCTL = POKEY+15 ;;;;;;;; ; GTIA ; ;;;;;;;; GTIA = $D000 GTIAwHPOSP0 = GTIA+0 GTIAwHPOSP1 = GTIA+1 GTIAwHPOSP2 = GTIA+2 GTIAwHPOSP3 = GTIA+3 GTIAwHPOSM0 = GTIA+4 GTIAwHPOSM1 = GTIA+5 GTIAwHPOSM2 = GTIA+6 GTIAwHPOSM3 = GTIA+7 GTIAwSIZEP0 = GTIA+8 GTIAwSIZEP1 = GTIA+9 GTIAwSIZEP2 = GTIA+10 GTIAwSIZEP3 = GTIA+11 GTIAwSIZEM = GTIA+12 GTIAwGRAFP0 = GTIA+13 GTIAwGRAFP1 = GTIA+14 GTIAwGRAFP2 = GTIA+15 GTIAwGRAFP3 = GTIA+16 GTIAwGRAFM = GTIA+17 GTIAwCOLPM0 = GTIA+18 GTIAwCOLPM1 = GTIA+19 GTIAwCOLPM2 = GTIA+20 GTIAwCOLPM3 = GTIA+21 GTIAwCOLPF0 = GTIA+22 GTIAwCOLPF1 = GTIA+23 GTIAwCOLPF2 = GTIA+24 GTIAwCOLPF3 = GTIA+25 GTIAwCOLBK = GTIA+26 GTIAwPRIOR = GTIA+27 GTIAwVDELAY = GTIA+28 GTIAwGRACTL = GTIA+29 GTIAwHITCLR = GTIA+30 GTIArM0PF = GTIA+0 GTIArM1PF = GTIA+1 GTIArM2PF = GTIA+2 GTIArM3PF = GTIA+3 GTIArP0PF = GTIA+4 GTIArP1PF = GTIA+5 GTIArP2PF = GTIA+8 GTIArP3PF = GTIA+7 GTIArM0PL = GTIA+8 GTIArM1PL = GTIA+9 GTIArM2PL = GTIA+10 GTIArM3PL = GTIA+11 GTIArP0PL = GTIA+12 GTIArP1PL = GTIA+13 GTIArP2PL = GTIA+14 GTIArP3PL = GTIA+15 GTIArTRIG0 = GTIA+16 GTIArTRIG1 = GTIA+17 GTIArTRIG2 = GTIA+18 GTIArTRIG3 = GTIA+19 ; GTIArwCONSOL = GTIA+31 ;;;;;;;;; ; ANTIC ; ;;;;;;;;; ANTIC = $D400 ANTICwDMACTL = ANTIC+0 ANTICwCHACTL = ANTIC+1 ANTICwDLISTL = ANTIC+2 ANTICwDLISTH = ANTIC+3 ANTICwHSCROL = ANTIC+4 ANTICwVSCROL = ANTIC+5 ANTICwPMBASE = ANTIC+7 ANTICwCHBASE = ANTIC+9 ANTICwWSYNC = ANTIC+10 ANTICwNMIEN = ANTIC+14 ANTICwNMIRES = ANTIC+15 ; ANTICrVCOUNT = ANTIC+11 ANTICrPENH = ANTIC+12 ANTICrPENV = ANTIC+13 ANTICrNMIST = ANTIC+15 ;;;;;;; ; PIA ; ;;;;;;; PIA = $D300 PIArwPORTA = PIA+0 PIArwPORTB = PIA+1 PIArwPACTL = PIA+2 PIArwPBCTL = PIA+3 ; ; PAGE2 = $0200 CHACT = PAGE2+1 DLIST_DATA = PWRUP DLIST_8BLANK = $70 DLIST_GR0 = 2 DLIST_LOADLMS = $40 DLIST_JUMPWAIT= $41 code org $c000 ;*************************************************************** ; POWER UP ROUTINES START HERE ;*************************************************************** ; PWRUP: sei ;DISABLE IRQ INTERRUPTS cld ;CLEAR DECIMAL FLAG. ldx #$FF txs ;SET STACK POINTER ; ; Clear all regisers of custom hardweare chips ; HARDI: lda #0 tax CLRCHP: sta GTIA,x sta ANTIC,x sta POKEY,x sta PIA,x inx bne CLRCHP ; ; initialise non hardware locations ; lda # hi CHSET sta ANTICwCHBASE lda #2 sta ANTICwCHACTL ; ldx #4 ;LOAD COLOR REGISTERS CLOOP: lda COLRTB,x sta GTIAwCOLPF0,x dex bpl CLOOP ; lda #6 ;PUT GTIA LUM VALUE INTO BACKGROUND REGISTER sta GTIAwCOLBK VBWAIT: lda ANTICrVCOUNT ;WAIT FOR NEXT VBLANK BEFORE MESSING lda # lo DLIST sta ANTICwDLISTL lda # hi DLIST sta ANTICwDLISTH lda #$22 ;34 = 32 (enable DMA) + 2 (standard playfield) sta ANTICwDMACTL ; INFLOOP: jmp INFLOOP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; COLRTB: db $28,$CA,$94,$46,$00 DLIST: db DLIST_8BLANK,DLIST_8BLANK,DLIST_8BLANK db DLIST_LOADLMS+DLIST_GR0 db lo DLIST_DATA db hi DLIST_DATA db 2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2 db DLIST_JUMPWAIT db lo DLIST db hi DLIST ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; org $f000 CHSET: db $00,$00,$00,$00,$00,$00,$00,$00 ;$00 - space db $00,$18,$18,$18,$18,$00,$18,$00 ;$01 - ! db $00,$66,$66,$66,$00,$00,$00,$00 ;$02 - " db $00,$66,$FF,$66,$66,$FF,$66,$00 ;$03 - # db $18,$3E,$60,$3C,$06,$7C,$18,$00 ;$04 - $ db $00,$66,$6C,$18,$30,$66,$46,$00 ;$05 - % db $1C,$36,$1C,$38,$6F,$66,$3B,$00 ;$06 - & db $00,$18,$18,$18,$00,$00,$00,$00 ;$07 - ' db $00,$0E,$1C,$18,$18,$1C,$0E,$00 ;$08 - ( db $00,$70,$38,$18,$18,$38,$70,$00 ;$09 - ) db $00,$66,$3C,$FF,$3C,$66,$00,$00 ;$0A - asterisk db $00,$18,$18,$7E,$18,$18,$00,$00 ;$0B - plus db $00,$00,$00,$00,$00,$18,$18,$30 ;$0C - comma db $00,$00,$00,$7E,$00,$00,$00,$00 ;$0D - minus db $00,$00,$00,$00,$00,$18,$18,$00 ;$0E - period db $00,$06,$0C,$18,$30,$60,$40,$00 ;$0F - / db $00,$3C,$66,$6E,$76,$66,$3C,$00 ;$10 - 0 db $00,$18,$38,$18,$18,$18,$7E,$00 ;$11 - 1 db $00,$3C,$66,$0C,$18,$30,$7E,$00 ;$12 - 2 db $00,$7E,$0C,$18,$0C,$66,$3C,$00 ;$13 - 3 db $00,$0C,$1C,$3C,$6C,$7E,$0C,$00 ;$14 - 4 db $00,$7E,$60,$7C,$06,$66,$3C,$00 ;$15 - 5 db $00,$3C,$60,$7C,$66,$66,$3C,$00 ;$16 - 6 db $00,$7E,$06,$0C,$18,$30,$30,$00 ;$17 - 7 db $00,$3C,$66,$3C,$66,$66,$3C,$00 ;$18 - 8 db $00,$3C,$66,$3E,$06,$0C,$38,$00 ;$19 - 9 db $00,$00,$18,$18,$00,$18,$18,$00 ;$1A - colon db $00,$00,$18,$18,$00,$18,$18,$30 ;$1B - semicolon db $06,$0C,$18,$30,$18,$0C,$06,$00 ;$1C - < db $00,$00,$7E,$00,$00,$7E,$00,$00 ;$1D - = db $60,$30,$18,$0C,$18,$30,$60,$00 ;$1E - > db $00,$3C,$66,$0C,$18,$00,$18,$00 ;$1F - ? db $00,$3C,$66,$6E,$6E,$60,$3E,$00 ;$20 - @ db $00,$18,$3C,$66,$66,$7E,$66,$00 ;$21 - A db $00,$7C,$66,$7C,$66,$66,$7C,$00 ;$22 - B db $00,$3C,$66,$60,$60,$66,$3C,$00 ;$23 - C db $00,$78,$6C,$66,$66,$6C,$78,$00 ;$24 - D db $00,$7E,$60,$7C,$60,$60,$7E,$00 ;$25 - E db $00,$7E,$60,$7C,$60,$60,$60,$00 ;$26 - F db $00,$3E,$60,$60,$6E,$66,$3E,$00 ;$27 - G db $00,$66,$66,$7E,$66,$66,$66,$00 ;$28 - H db $00,$7E,$18,$18,$18,$18,$7E,$00 ;$29 - I db $00,$06,$06,$06,$06,$66,$3C,$00 ;$2A - J db $00,$66,$6C,$78,$78,$6C,$66,$00 ;$2B - K db $00,$60,$60,$60,$60,$60,$7E,$00 ;$2C - L db $00,$63,$77,$7F,$6B,$63,$63,$00 ;$2D - M db $00,$66,$76,$7E,$7E,$6E,$66,$00 ;$2E - N db $00,$3C,$66,$66,$66,$66,$3C,$00 ;$2F - O db $00,$7C,$66,$66,$7C,$60,$60,$00 ;$30 - P db $00,$3C,$66,$66,$66,$6C,$36,$00 ;$31 - Q db $00,$7C,$66,$66,$7C,$6C,$66,$00 ;$32 - R db $00,$3C,$60,$3C,$06,$06,$3C,$00 ;$33 - S db $00,$7E,$18,$18,$18,$18,$18,$00 ;$34 - T db $00,$66,$66,$66,$66,$66,$7E,$00 ;$35 - U db $00,$66,$66,$66,$66,$3C,$18,$00 ;$36 - V db $00,$63,$63,$6B,$7F,$77,$63,$00 ;$37 - W db $00,$66,$66,$3C,$3C,$66,$66,$00 ;$38 - X db $00,$66,$66,$3C,$18,$18,$18,$00 ;$39 - Y db $00,$7E,$0C,$18,$30,$60,$7E,$00 ;$3A - Z db $00,$1E,$18,$18,$18,$18,$1E,$00 ;$3B - [ db $00,$40,$60,$30,$18,$0C,$06,$00 ;$3C - \ db $00,$78,$18,$18,$18,$18,$78,$00 ;$3D - ] db $00,$08,$1C,$36,$63,$00,$00,$00 ;$3E - ^ db $00,$00,$00,$00,$00,$00,$FF,$00 ;$3F - underline db $00,$36,$7F,$7F,$3E,$1C,$08,$00 ;$40 - heart card db $18,$18,$18,$1F,$1F,$18,$18,$18 ;$41 - mid left window db $03,$03,$03,$03,$03,$03,$03,$03 ;$42 - right box db $18,$18,$18,$F8,$F8,$00,$00,$00 ;$43 - low right window db $18,$18,$18,$F8,$F8,$18,$18,$18 ;$44 - mid right window db $00,$00,$00,$F8,$F8,$18,$18,$18 ;$45 - up right window db $03,$07,$0E,$1C,$38,$70,$E0,$C0 ;$46 - right slant box db $C0,$E0,$70,$38,$1C,$0E,$07,$03 ;$47 - left slant box db $01,$03,$07,$0F,$1F,$3F,$7F,$FF ;$48 - right slant solid db $00,$00,$00,$00,$0F,$0F,$0F,$0F ;$49 - low right solid db $80,$C0,$E0,$F0,$F8,$FC,$FE,$FF ;$4A - left slant solid db $0F,$0F,$0F,$0F,$00,$00,$00,$00 ;$4B - up right solid db $F0,$F0,$F0,$F0,$00,$00,$00,$00 ;$4C - up left solid db $FF,$FF,$00,$00,$00,$00,$00,$00 ;$4D - top box db $00,$00,$00,$00,$00,$00,$FF,$FF ;$4E - bottom box db $00,$00,$00,$00,$F0,$F0,$F0,$F0 ;$4F - low left solid db $00,$1C,$1C,$77,$77,$08,$1C,$00 ;$50 - club card db $00,$00,$00,$1F,$1F,$18,$18,$18 ;$51 - up left window db $00,$00,$00,$FF,$FF,$00,$00,$00 ;$52 - mid box db $18,$18,$18,$FF,$FF,$18,$18,$18 ;$53 - mid window db $00,$00,$3C,$7E,$7E,$7E,$3C,$00 ;$54 - solid circle db $00,$00,$00,$00,$FF,$FF,$FF,$FF ;$55 - bottom solid db $C0,$C0,$C0,$C0,$C0,$C0,$C0,$C0 ;$56 - left box db $00,$00,$00,$FF,$FF,$18,$18,$18 ;$57 - up mid window db $18,$18,$18,$FF,$FF,$00,$00,$00 ;$58 - low mid window db $F0,$F0,$F0,$F0,$F0,$F0,$F0,$F0 ;$59 - left solid db $18,$18,$18,$1F,$1F,$00,$00,$00 ;$5A - low left window db $78,$60,$78,$60,$7E,$18,$1E,$00 ;$5B - display escape db $00,$18,$3C,$7E,$18,$18,$18,$00 ;$5C - up arrow db $00,$18,$18,$18,$7E,$3C,$18,$00 ;$5D - down arrow db $00,$18,$30,$7E,$30,$18,$00,$00 ;$5E - left arrow db $00,$18,$0C,$7E,$0C,$18,$00,$00 ;$5F - right arrow db $00,$18,$3C,$7E,$7E,$3C,$18,$00 ;$60 - diamond card db $00,$00,$3C,$06,$3E,$66,$3E,$00 ;$61 - a db $00,$60,$60,$7C,$66,$66,$7C,$00 ;$62 - b db $00,$00,$3C,$60,$60,$60,$3C,$00 ;$63 - c db $00,$06,$06,$3E,$66,$66,$3E,$00 ;$64 - d db $00,$00,$3C,$66,$7E,$60,$3C,$00 ;$65 - e db $00,$0E,$18,$3E,$18,$18,$18,$00 ;$66 - f db $00,$00,$3E,$66,$66,$3E,$06,$7C ;$67 - g db $00,$60,$60,$7C,$66,$66,$66,$00 ;$68 - h db $00,$18,$00,$38,$18,$18,$3C,$00 ;$69 - i db $00,$06,$00,$06,$06,$06,$06,$3C ;$6A - j db $00,$60,$60,$6C,$78,$6C,$66,$00 ;$6B - k db $00,$38,$18,$18,$18,$18,$3C,$00 ;$6C - l db $00,$00,$66,$7F,$7F,$6B,$63,$00 ;$6D - m db $00,$00,$7C,$66,$66,$66,$66,$00 ;$6E - n db $00,$00,$3C,$66,$66,$66,$3C,$00 ;$6F - o db $00,$00,$7C,$66,$66,$7C,$60,$60 ;$70 - p db $00,$00,$3E,$66,$66,$3E,$06,$06 ;$71 - q db $00,$00,$7C,$66,$60,$60,$60,$00 ;$72 - r db $00,$00,$3E,$60,$3C,$06,$7C,$00 ;$73 - s db $00,$18,$7E,$18,$18,$18,$0E,$00 ;$74 - t db $00,$00,$66,$66,$66,$66,$3E,$00 ;$75 - u db $00,$00,$66,$66,$66,$3C,$18,$00 ;$76 - v db $00,$00,$63,$6B,$7F,$3E,$36,$00 ;$77 - w db $00,$00,$66,$3C,$18,$3C,$66,$00 ;$78 - x db $00,$00,$66,$66,$66,$3E,$0C,$78 ;$79 - y db $00,$00,$7E,$0C,$18,$30,$7E,$00 ;$7A - z db $00,$18,$3C,$7E,$7E,$18,$3C,$00 ;$7B - spade card db $18,$18,$18,$18,$18,$18,$18,$18 ;$7C - | db $00,$7E,$78,$7C,$6E,$66,$06,$00 ;$7D - display clear db $08,$18,$38,$78,$38,$18,$08,$00 ;$7E - display backspace db $10,$18,$1C,$1E,$1C,$18,$10,$00 ;$7F - display tab ;;;;;;;;;;; ; VECTORS ; ;;;;;;;;;;; org $fffa dw PWRUP dw PWRUP dw PWRUP This is the resultant display... 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Wrathchild Posted March 9, 2020 Share Posted March 9, 2020 The source is referencing POKEY and PIA when in the first post you said these were missing? 38 minutes ago, atariry said: VBWAIT: lda ANTICrVCOUNT ;WAIT FOR NEXT VBLANK BEFORE MESSING This seems odd as there is no actual check going on here? What should be going on here is that only middle (RESET) vector goes to PWRUP. The IRQ handler might not have much purpose in a simple design and so could be handled with: IRQ_BRK: CLD JMP (VIMIRQ) DUMMY_IRQ: RTI INIT_IRQ: LDA #<DUMMY_IRQ STA VIMIRQ LDA #>DUMMY_IRQ STA VIMIRQ+1 RTS The NMI handler should be able to handle display related interrupts and so this would include the vblank and dlisplay list interrupt: NMI_handler: BIT NMIRES BPL not_dli JMP (VDSLST) not_dli: CLD PHA TXA PHA TYA PHA STA NMIRES JMP (VVBLKI) This would therefore need so basic functionality associated with it, e.g. copying shadow registers to h/w registers INIT_NMI: LDA #<DLI_Dummy STA VDSLST LDA #>DLI_Dummy STA VDSLST+1 LDA #<VBI_handler STA VVBLKI LDA #>VBI_handler STA VVBLKI+1 RTS DLI_Dummy: RTI VBI_handler: LDA SDLSTL STA DLISTL LDA SDLSTH STA DLISTH LDA COLOR0 STA COLPF0 LDA COLOR1 STA COLPF1 LDA COLOR2 STA COLPF2 LDA COLOR3 STA COLPF3 LDA COLOR4 STA COLBK LDA SKSTAT AND #SKSTAT_LASTKEY_PRESSED BNE KB LDA KBCODE CMP CH1 BEQ KB STA CH KB: STA CH1 PLA TAY PLA TAX PLA RTI In your startup code you can add calls to INIT_IRQ and INIT_NMI Quote Link to comment Share on other sites More sharing options...
atariry Posted March 9, 2020 Author Share Posted March 9, 2020 (edited) 21 hours ago, Wrathchild said: The source is referencing POKEY and PIA when in the first post you said these were missing? ... This seems odd as there is no actual check going on here? ... What should be going on here is that only middle (RESET) vector goes to PWRUP. ... All good points, so... 1) POKEY and PIA register address defines are there for future use. I do intend to add these chips in the future. Currently they are not wired or plugged in, but there is room for them on the breadboards. 2) some code left over from cut and pasting from OS source. That/this line serves no purpose (VBWAIT: lda ANTICrVCOUNT ;WAIT FOR NEXT VBLANK BEFORE MESSING). 3) I am not using NMI or IRQ, but didn't want to leave the vectors empty. To keep the code as short and simple as possible I write directly to hardware and I have not implemented shadow registers. However your code could be very helpful for a future revision. Thank you. The code was more or less cut and pasted from a disassembly of the OS. When I took a look at the 5200 OS source code I was rather shocked at the similarity. NOTE: my hardware has no video circuitry. I firstly want to view the outputs of GTIA on a scope and then later connect them to the FPGA. I will possibly add the original video combiner circuity just to try the various component changes and tweaks found in various forum posts, just to see how clean I can get the picture on my Dell. As I mentioned the picture from my 130XE is horrendous with very visible jail bars. I am no analogue expert, but I suspect part of the 130XE problem was caused by signal routing and grounding. Next step is to add the 32 channel logic analyser (known as "SUMP"), based on a cheap Chinese Spartan6 FPGA board, which incorporates 5V level shifters, bought for only $15 on AliExpress (google - RTV901T). I am still in the process of porting the code to this platform. Given how expensive even 16 channel logic analysers are, this is a super cheap solution. Edited March 9, 2020 by atariry missing word Quote Link to comment Share on other sites More sharing options...
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