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How would 65c816 (e.g., Rapidus) interact with the rest of the atari. I’m sure you may have done this already. At a high level (or low level if you prefer), how is the interaction with the system.

 

If I may expand on this, what I mean if you create a game or any type of graphical application, do you even use 6502, and other components of the atari (I’m sure you have to use some). What do you bypass if any. I sow @drac030 talking about the lda random and how slow pokey (I think he said) compared to 68c186 that would take more cycles to wait. And please, if I said anything wrong, correct me please. 

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20 minutes ago, Blues76 said:

How would 65c816 (e.g., Rapidus) interact with the rest of the atari. I’m sure you may have done this already. At a high level (or low level if you prefer), how is the interaction with the system. 

As far as I understand it, accelerators run at 4x or 8x times the original Atari clock speed. As long as they only access fast RAM, it runs at that speed. Once it accesses slow memory locations, e.g. ROM or hardware registers, it does a slow 1.79MHz cycle. Same when ANTIC asserts /HALT or /REF.

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19 minutes ago, ivop said:

As far as I understand it, accelerators run at 4x or 8x times the original Atari clock speed. As long as they only access fast RAM, it runs at that speed. Once it accesses slow memory locations, e.g. ROM or hardware registers, it does a slow 1.79MHz cycle. Same when ANTIC asserts /HALT or /REF.

Would Rapidus be able to access vbxe directly or would need to use the 6502 or some other component? 

 

Wouldn’t a game slow down to read the joystick input ?

Edited by Blues76
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39 minutes ago, Blues76 said:

If I may expand on this, what I mean if you create a game or any type of graphical application, do you even use 6502, and other components of the atari (I’m sure you have to use some). What do you bypass if any.

From the "user" point of view, just the CPU gets replaced with its faster version. So the 6502 is bypassed, and the rest of the Atari is used normally. Specifically on the Rapidus accelerator the 6502 can be used in parallel (the board provides mechanism to unhalt the 6502, halt the 65C816 or to arbitrate the memory/hardware accesses between these two running simultaneously).

 

Also, the memory located on the main computer's board is running at 1.77 MHz, so certain amount of Fast RAM is needed to cache the accesses so that the CPU does not have to wait for the slow board to provide the data requested. So the RAM is also "bypassed" to some extent.

 

EDIT:

 

Reading the joystick port requires the CPU to wait until the data is provided by the PIA. The VBXE may be used "directly", but the communication is also being made through the slow bus (because VBXE is attached to the slow bus).

Edited by drac030
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3 minutes ago, drac030 said:

From the "user" point of view, just the CPU gets replaced with its faster version. So the 6502 is bypassed, and the rest of the Atari is used normally. Specifically on the Rapidus accelerator the 6502 can be used in parallel (the board provides mechanism to unhalt the 6502, halt the 65C816 or to arbitrate the memory/hardware accesses between these two running simultaneously).

 

Also, the memory located on the main computer's board is running at 1.77 MHz, so certain amount of Fast RAM is needed to cache the accesses so that the CPU does not have to wait for the slow board to provide the data requested. So the RAM is also "bypassed" to some extent.

 

If someone developed a game or graphical application on the rapidus, could you go directly to vbxe? wouldn’t the joystick be a problem ! 

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3 minutes ago, Blues76 said:

If someone developed a game or graphical application on the rapidus, could you go directly to vbxe? wouldn’t the joystick be a problem ! 

You got your answer :) But even if 10% of your time is spent on the slow bus (reading joystick, programming ANTIC/GTIA, Pokey, VBXE), the remaining time Rapidus can do all calculations up to 8x faster.

 

10 minutes ago, drac030 said:

the board provides mechanism to unhalt the 6502, halt the 65C816 or to arbitrate the memory/hardware accesses between these two running simultaneously

That's something I didn't know. Very cool! So as long as the 65C816 sticks to its own fast memory, our Sally 6502 can run in parallel doing what it normally does?

 

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9 minutes ago, Blues76 said:

If someone developed a game or graphical application on the rapidus, could you go directly to vbxe? wouldn’t the joystick be a problem !

Every type of hardware attached to the Atari motherboard, which can be accessed by 6502, can also be accessed by 65C816.

 

3 minutes ago, ivop said:

the remaining time Rapidus can do all calculations up to 8x faster.

11 times, actually, with some fraction (20 / 1.773 = 11.28031...) :D

 

5 minutes ago, ivop said:

So as long as the 65C816 sticks to its own fast memory, our Sally 6502 can run in parallel doing what it normally does?

Yes. And when there is a conflict, i.e. they both want to access the same resource, the 6502 gets temporarliy halted.

 

 

 

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I found this book 

https://www.amazon.com/Programming-65816-Including-65C02-65802/dp/0893037893/ref=mp_s_a_1_1?dchild=1&keywords=65c816&qid=1606500684&sr=8-1

 

Is there any other book or resource that you recommend for the 68c186? 

 

Of course, the different question if I would have much time to do anything.  

 

The Atari Roots foe 6502 atari seems good. I have done assembly like this but never in the Atari. 

 

Very cool answers @ivop and @drac030

 

Thank you so much for taking the time to feed my curiosity. 

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Well, 65C816 is a superset of the 6502, so actually any decent 6502 programming resource will IMHO do. But if specifically 65C816 is concerned, I do not know any other book on this topic than the one you found (there are some internet resources also, on 6502.org for example, on SNES sites and on Apple IIGS sites).

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If .ORG specifies an address > $00FFFF does ELSA generate a different binary header ? What would I get if I specify .ORG $010100, still the standard $FFFF header ? The manual doesn't say.

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11 hours ago, Alfred said:

If .ORG specifies an address > $00FFFF does ELSA generate a different binary header ? What would I get if I specify .ORG $010100, still the standard $FFFF header ? The manual doesn't say.

The high word of the PC is ignored when the binary headers are generated. So yes, standard only.

 

I have not yet decided what file format should be adopted for programs which need to be loaded to the high RAM. So far I have defined a "simple compact exec" binary file (64 KB for code+data with a provision for 64KB code + 64 KB data). The advantage is that it does not require special support from the assembler, there is 4-word header which you define in the source (as a part of startup code), the bin file is position-independent with 256-byte granularity (always loaded at page boundary), and there is simple interface to tie all this to the underlying OS, if needed, which (the interface) can be omitted when necessary - so the shortest possible program in this format - consisting of RTL only - is 9 bytes in length.

 

I even wrote a proof-of-concept loader and runtime and all this even works (I have few test programs written and the stars3d effect ported to that format), but currently I am not very satisfied with the fact that the runtime occupies so much, i.e. 5 KB, of the segment 0 memory. So I am going to rewrite all this from scratch using different approach, so that most of the runtime including the binary loader will be loaded to the extra memory and occupy space there leaving as much free segment 0 RAM as possible.

 

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The version 0.93 uploaded http://drac030.krap.pl/en-elsa-pliki.php

 

Just for the records: in the documentation conversion (odt->html->txt) the listings get converted better if the indentation is made with hard spaces instead of TABs or normal spaces - the indents will not get removed then. For best results one should probably also use a non-proportional font for assembly listings too.

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I have uploaded version 0.94 to the same address as above.

 

One major new thing is that ELSA is now able to generate SpartaDOS X relocatable binaries. I seem to have managed to make SpartaDOS X support more flexible than in MADS (let alone FA), for example, all 65C816 instructions and addressing modes will generate fixups, where applicable; also, labels declared as external symbols can be used in arithmetic expressions, the result of such an expression will then generate the external reference record when used, e.g.

 

	.xref COMTAB

lbuf = COMTAB+$3f
...
...
	lda lbuf

"lda lbuf" will cause the XREF record for the symbol "COMTAB" to be inserted into the object file.

 

Also, fixups work between program blocks loaded to different 64k segments. To use this one will need to load an additional extension module, which will come with next beta release of SDX (on the Toolkit).

 

Edited by drac030
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On 11/27/2020 at 1:24 PM, drac030 said:

 But if specifically 65C816 is concerned, I do not know any other book on this topic than the one you found (there are some internet resources also, on 6502.org for example, on SNES sites and on Apple IIGS sites).

There’s a McGraw-Hill book, published 1986 called 65816/65802 Assembly Language Programming. Not as good a reference as the Eyes & Lichty book in my opinion. It’s similar in style to Leventhal’s 6502 book.

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IMHO the best is to start programming as on 6502, then gradually get used to new features.

 

I can observe that the thing which perhaps is most challenging are the variable-size registers: if the program does not work while it "definitely" should, then it is almost certainly the register size set different than expected in a place. It takes some time to get used to that. Therefore it is best to start off with some default size selected for the entire program, and change it only for particular tasks (subroutines), until remembering what is currently selected becomes automatic.

 

New ELSA version on my site, by the way.

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