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#FujiNet Hardware Discussion


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Hi,

 

i'm completly new to this project. I find it awesome and I would like to build one device to contribute as tester.

 

So what would be the right way to actually assemble one device?

As a complete dummy to hardware I assume I have 3 separate domains to address:

1) order the hardware basket (e.g. esp, buttons, resistors, etc.)

2) order the pcb according to schematics 

3) order the case according to the model

..

4) my turn: soldering, assembling, firmware loading, using.

 

I see 3) can be done -> although I never ordered a printed case - but it sounds fun.

But what I'm totally missing is 1) and 2) .. is this somewhere documented?

 

grüße

\twh

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Hello guys

 

Am I correct in assuming that an IPEX antenna is better (reception wise) than a PCB antenna?

I've Googled "IPEX antenna" and it looks like there are many different IPEX antennas.  Who can tell me what's a good antenna?

 

6 hours ago, twh/f2 said:

2) order the pcb according to schematics 

 

I hope the files we need to have PCB's made are on github.

How do you guys order these PCB's?  Bare or with the SMD stuff already soldered onto them?

 

Sincerely

 

Mathy

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19 hours ago, mozzwald said:

This thread is for discussion of the #FujiNet hardware and it's progress. 

 

Hardware schematics and design files when made available will be in the Wiki and the fujinet-hardware repository on github. 

 

Current vertical hardware design looks like: 

FujiNet-Prototype-Vertical-XE-and-XL-Style_1024.thumb.jpg.c95a35bef2c3abb8dfbb565ad92327af.jpg

 

FujiNet-Prototype-Vertical-LEDS-ON_1024.thumb.jpg.1d838cda1bf790662cf961d0b3728564.jpg

Are those functional 3D designs or just mock ups?  I was looking at the Tinker CAD files for those and I didn't see where the case splits to mount the parts and print the case sections.  Of course I am very need at Tinker CAD.

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15 minutes ago, Fierodoug5 said:

They are all separate pieces, just drag them apart in tinkercad and you can export them as separate stl files.

Thanks.  I'll play with it later and try that.  I was also trying to export them into OpenSCAD since I am more familiar with that.  But I am thinking that is a lost cause.  But we'll see.

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15 minutes ago, Fierodoug5 said:

Pcb files are not available. He just came up with the latest version and think he has only built the one unit so far

Ok.  Usually when I do a design, I do partial test prints.  Then check the fit and location of things against that and the actual board.  Iterate from there.  Saves material and print time to just do a check of things.

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If there isn’t a PCB design at least, the audience of builder/testers is going to be severely limited. I can build a board, probably figure out how to compile and write code the finished product, but I for damn sure am not going to learn PCB layout software and route traces for an unfinished design. :)

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23 minutes ago, DrVenkman said:

If there isn’t a PCB design at least, the audience of builder/testers is going to be severely limited. I can build a board, probably figure out how to compile and write code the finished product, but I for damn sure am not going to learn PCB layout software and route traces for an unfinished design. :)

I agree, hopefully they allow pcb files to be released at some point.

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Hello guys

 

I might be wrong, but wouldn't "no PCB files" result in "probably won't fit case"?  As in "you'll have to redesign the case yourself"?

 

Sincerely

 

Mathy  (who didn't get that the readme-file contained more then was already shown and did a lot of searching for nothing)

 

 

Edited by Mathy
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5 hours ago, Mathy said:

Am I correct in assuming that an IPEX antenna is better (reception wise) than a PCB antenna?

I've Googled "IPEX antenna" and it looks like there are many different IPEX antennas.  Who can tell me what's a good antenna?

IPEX is the connector brand for coaxial antennas typically used in electronics. This could be used for an external antenna instead of the onboard PCB antenna. One would need to solder the connector onto the WROVER module and move a resistor for the external antenna to be used.

 

2 hours ago, djones60 said:

Are those functional 3D designs or just mock ups?  I was looking at the Tinker CAD files for those and I didn't see where the case splits to mount the parts and print the case sections.  Of course I am very need at Tinker CAD.

 

1 hour ago, djones60 said:

Ok.  Usually when I do a design, I do partial test prints.  Then check the fit and location of things against that and the actual board.  Iterate from there.  Saves material and print time to just do a check of things.

Both cases are functional and currently in use. In Tinkercad you can move the individual parts around and export any piece. There are 2 case halves, 2 SIO connectors, 2 sets of SIO pins and the PCB. The PCB model is a 3D render of the actual PCB with parts on it. The case was built around this 3D model of the PCB.

 

5 hours ago, Mathy said:

How do you guys order these PCB's?  Bare or with the SMD stuff already soldered onto them?

The PCB's are ordered bare and I hand assemble them. More work needs done to make them Pick N Place ready so they can be soldered in the factory. The final revision and first run will have SMD parts assembled in the factory and I will likely solder the through hole parts myself.

 

2 hours ago, Fierodoug5 said:

Pcb files are not available. He just came up with the latest version and think he has only built the one unit so far

 

50 minutes ago, DrVenkman said:

If there isn’t a PCB design at least, the audience of builder/testers is going to be severely limited. I can build a board, probably figure out how to compile and write code the finished product, but I for damn sure am not going to learn PCB layout software and route traces for an unfinished design.

 

26 minutes ago, Fierodoug5 said:

I agree, hopefully they allow pcb files to be released at some point.

 

22 minutes ago, _The Doctor__ said:

Just hit the repository and was surprised they were not there.

The PCB design files have not been released yet. There have already been 6 revisions of the hardware and there is guaranteed to be at least 1 more. I do not want to release PCB files with a major mistake and have others waste any money (1 set of pcbs already were a total loss because of a stupid mistake). The past few revisions have been small 10 piece runs hand assembled by me and shipped to a small group of developers and testers. The goal is to release the Diptrace design files, PCB Gerbers and final 3D case designs after I do a small or medium run of completed product. I have invested gobs of money and time into this project and would like to recoup some money back if I can, even though I do not expect to come close to breaking even. If I get to a point where I decide not to do a run I will release the design files for anyone to make their own.

 

I have been releasing the schematics as a good faith effort to keep the project open and hopefully get input from others. Anyone with the skills can build their own hardware based on the schematics (and already have!). If it weren't for @Fierodoug5 we might have pressed on not knowing that there was an audio issue with the 800 and FujiNet. This problem is now fixed. I'm pretty sure there's at least one other person working on their own FujiNet hardware design based on the schematic. More power to them. Take it and make it! That's what it's there for.

 

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13 hours ago, Mathy said:

Hello guys

 

I might be wrong, but wouldn't "no PCB files" result in "probably won't fit case"?  As in "you'll have to redesign the case yourself"?

 

Sincerely

 

Mathy  (who didn't get that the readme-file contained more then was already shown and did a lot of searching for nothing)

 

 

That is why I asked and mentioned test printing to fit the case to the board.  That way it would hopefully just work for everyone else.  The designers would be doing all the grunt work of getting things to line up and fit.  Something I would be happy to help with.

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Hi Mozzwald,

 

    I have a question about two signals coming off of the U2 chip.  According to ver 6 of the hardware schematics in the wiki hardware board versions,  pin 9 goes to CP2102_Reset, but I cannot find it anywhere else on the schematic.  Also pin 6 has the signal IO2_RESET going through R7, but again I can't find that signal anywhere else on the schematic. 

 

    Now it's possible I need my eyesight checked.  ?   Or maybe this isn't the newest schematic....

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4 minutes ago, Dropcheck said:

Hi Mozzwald,

 

    I have a question about two signals coming off of the U2 chip.  According to ver 6 of the hardware schematics in the wiki hardware board versions,  pin 9 goes to CP2102_Reset, but I cannot find it anywhere else on the schematic.  Also pin 6 has the signal IO2_RESET going through R7, but again I can't find that signal anywhere else on the schematic. 

 

    Now it's possible I need my eyesight checked.  ?   Or maybe this isn't the newest schematic....

Oops. Looks like the schematic export cut that off. R7 goes to CP2102_RESET (pin 9 of U2). I'll fix that tonight

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2 minutes ago, Dropcheck said:

Also I seem to remember that you decided to remove the extra cap on the signal going to U1 pin 10, C4 I think?

That's correct. I left the pads/part there and "NOSTUFF" instead of capacitor value means do not place any parts ?

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On 5/12/2020 at 8:24 PM, mozzwald said:

This thread is for discussion of the #FujiNet hardware and it's progress. 

 

Hardware schematics and design files when made available will be in the Wiki and the fujinet-hardware repository on github. 

 

Current vertical hardware design looks like: 

FujiNet-Prototype-Vertical-XE-and-XL-Style_1024.thumb.jpg.c95a35bef2c3abb8dfbb565ad92327af.jpg

 

FujiNet-Prototype-Vertical-LEDS-ON_1024.thumb.jpg.1d838cda1bf790662cf961d0b3728564.jpg

 

Not recommended, at all

 

Will not universally fit the 8bit lineup, even if it has a pass-through SIO port in the back (will look incoherent when hooked up to a 400 or 800, for instance). Also,  it will not be able to fit properly on an active SIO hub like this one, which is a GOD-send for ultra-high speed SIO divisors (below 5):

 

3A2107DA-F320-480D-8B1F-D407AE1A4F20.thumb.jpeg.2d35fa8bad316fc3834f6dfd68dcf578.jpeg

 

Unless, of course, it comes with a male-SIO connector that allows it to be interfaced with standard SIO extensions / cables.

 

 

 

 

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1 minute ago, Faicuai said:

 

Not recommended, at all

 

Will not universally fit the 8bit lineup, and will not be able to fit properly on an active SIO hub like this one:

 

3A2107DA-F320-480D-8B1F-D407AE1A4F20.thumb.jpeg.2d35fa8bad316fc3834f6dfd68dcf578.jpeg

 

Unless, of course, it comes with a male-SIO connector that allows it to be interfaced with standard SIO extensions / cables.

 

 

 

 

It has a SIO plug and receptacle. You could plug the FujiNet directly into the computer with the plug and use the FujiNet receptacle to connect to your hub via SIO cable.

 

You could also use the FujiNet receptacle with a SIO cable and plug that into the hub and not use the FujiNet plug.

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7 hours ago, Faicuai said:

Will not universally fit the 8bit lineup, even if it has a pass-through SIO port in the back (will look incoherent when hooked up to a 400 or 800, for instance).

So far, it fits all the consoles tested. The only console it definitely wont fit that we know of is the 1088XLD. I wouldn't say it looks 'incoherent' on the 400/800. The XL styling doesn't really match the aesthetic, sure, but it's not obnoxious. I spose that's up to personal preference anyway :) Here's what it looks like:

FujiNet on Atari 800

 

FujiNet-on-Atari-400_1024.thumb.jpg.25d67bb1d250c464cdf85b408de0c8d5.jpg

 

7 hours ago, Faicuai said:

SIO hub like this one, which is a GOD-send for ultra-high speed SIO divisors (below 5)

How does the hub help higher speed transfers? I thought it was just a powered bus splitter.

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