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#FujiNet Hardware Discussion


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So that we are all on the same page as to the addition of the SD Card Detect switch, here is the 576NUC-FujiNet schematic showing it incorporated: 576NUC-FujiNet_Proto_V1.4_schema (revised again).pdf

 

Keep in mind that I am using a standard size SD card socket, so some pin numbers will be different than the MicroSD that you currently use on your FujiNet hardware design. However the principle remains the same. And for the sake of minimizing the BOM differences between the 576NUC+ main board and the FujiNet add-on, I have spec'ed a 4.7K pull-up resistor array. This is not critical so if desired a 10K array can be substituted instead.

 

BTW, mozzwald I did get my SD drive to work on a 2nd board assembly. Apparently it really was a slightly damaged ESP module that was causing the problem with it not working on the first prototype build.

 

EDIT: Just for future reference, but unrelated to this particular discussion, I eventually plan to utilize one of the extra 74LS07 gates to also buffer (and isolate) the SIO cassette motor control line going into the ESP module. So when FujiNet power is switched off and that buffer gets powered down, the SIO motor control line will get severed from the ESP module same as all the other signals. This will prevent any possibility of power back flowing from the 576NUC+ into the ESP32 via the motor control transistor if normal cassette operations are being conducted on the NUC. I just updated the schematic download on this post to reflect this change.

Edited by mytek
Just Updated Schematic once again - fixed incorrect ID
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4 hours ago, mytek said:

BTW, mozzwald I did get my SD drive to work on a 2nd board assembly. Apparently it really was a slightly damaged ESP module that was causing the problem with it not working on the first prototype build.

awesome, glad you got it working

4 hours ago, mytek said:

So that we are all on the same page as to the addition of the SD Card Detect switch, here is the 576NUC-FujiNet schematic showing it incorporated:

Last night I bodged in a 10K pullup like so:

1722070759_Screenshotfrom2021-03-1818-23-55.png.e0d8f50e3781148b383e2233aea0ecad.png

and did some testing with the firmware. I had to use the esp32's internal pull up/down resistors to check if there was a pull up on IO12. There are some new functions to get the hardware version that is run at bootup and to check for the safe reset button C. We will have to figure out what to do with the card detect, but at least now we can determine if it's available or not.

4 hours ago, mytek said:

I eventually plan to utilize one of the extra 74LS07 gates to also buffer (and isolate) the SIO cassette motor control line going into the ESP module

I can't remember what the problem was, but I had issues when trying to run MOTOR thru the 74LS07 so I left it directly connected with the pull down. If you test it and it works, let me know and I'ill give it another go.

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10 minutes ago, mozzwald said:

We will have to figure out what to do with the card detect, but at least now we can determine if it's available or not.

It's a start. Essentially you would be looking for a change in the detect switch from a high state to a low state, and when seen, initiate a safe reset. That should automatically mount the new card in the socket same as if I pressed the safe reset button after inserting a card.

 

12 minutes ago, mozzwald said:

I can't remember what the problem was, but I had issues when trying to run MOTOR thru the 74LS07 so I left it directly connected with the pull down. If you test it and it works, let me know and I'ill give it another go.

I can kludge up something on my existing board to match this new design. Any suggestions on a good test to see if all is OK?

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3 minutes ago, mytek said:

It's a start. Essentially you would be looking for a change in the detect switch from a high state to a low state, and when seen, initiate a safe reset. That should automatically mount the new card in the socket same as if I pressed the safe reset button after inserting a card.

I wonder if we even need to reset. Maybe we can just unmount anything that was on the SD card then detect the new card.

5 minutes ago, mytek said:

I can kludge up something on my existing board to match this new design. Any suggestions on a good test to see if all is OK?

Try loading a cassette image from FujiNet. There's a few on the FujiNet.online TNFS server

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26 minutes ago, mozzwald said:

I wonder if we even need to reset. Maybe we can just unmount anything that was on the SD card then detect the new card.

Try loading a cassette image from FujiNet. There's a few on the FujiNet.online TNFS server

then go grab a cup of coffee.. ;)

-Thom

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Ok so I tested loading a cassette file with a 74LS07 gate in series with the motor control line and it works fine. At first I thought I'd need to add a pull-up on the output because it is open drain, but no need (was seeing a tad bit over 3.3 V on the VP input, and it was solid). Must be an internal pull-up in action on the VP input.

 

I have also wired up the IO12 input to the SD card detect switch with a pull-up resistor to 3.3V. So I'm ready for any changes in the firmware related to that, when and if you get the time.

 

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37 minutes ago, mytek said:

Ok so I tested loading a cassette file with a 74LS07 gate in series with the motor control line and it works fine.

I'll see about testing this again and see if I can get it to work. When I tried it before I was using a breadboard.

40 minutes ago, mytek said:

I have also wired up the IO12 input to the SD card detect switch with a pull-up resistor to 3.3V. So I'm ready for any changes in the firmware related to that, when and if you get the time

I pushed a 'silent' firmware update this evening with the new hardware version check so just run the flash tool to get it. If you have the pull up on IO12 you should see v1.6 hardware version in the boot messages. Nothing uses the card detect pin yet though.

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On 3/19/2021 at 8:15 PM, mozzwald said:

I'll see about testing this again and see if I can get it to work. When I tried it before I was using a breadboard.

I ended up adding a pull-up resistor to the 74LS07 output going to VP, just because it was the right thing to do with it being an open drain output.

 

Here's the updated schematic as to where things are at on my modded board: 576NUC-FujiNet_Proto_V1.5_schema.pdf

NOTE: A minor update was required on 4/08/2021 to adjust voltage divider output to 3.125V with a 5V SIO voltage input

            A minor update was required on 3/25/2021 to correct the part numbers shown for the 3.3V regulator and the 10K SIP.

            A minor update was required on 4/03/2021 to adjust the value of R2 which is responsible for S.A.M. volume level (decreased from 47K down to 33K)

 

On 3/19/2021 at 8:15 PM, mozzwald said:

I pushed a 'silent' firmware update this evening with the new hardware version check so just run the flash tool to get it. If you have the pull up on IO12 you should see v1.6 hardware version in the boot messages. Nothing uses the card detect pin yet though.

I updated the firmware, and I can see the new hardware version in the log.

Using '/dev/ttyUSB0' as serial port.
Showing logs:
[09:05:33][09:05:33]
[09:05:33]--~--~--~--
[09:05:33]FujiNet 0.5.2656cf16 2021-03-19 17:56:48 Started @ 4
[09:05:33]Starting heap: 4056748
[09:05:33]PsramSize 3917592
[09:05:33]himem phys 4456448
[09:05:33]himem free 4456448
[09:05:33]himem reserved 262144
[09:05:33]Detected Hardware Version: 1.6 & up
[09:05:33]Enabled Safe Reset Button C
[09:05:33]SPIFFS mounted.
[09:05:33]SD mounted.
[09:05:33]fnConfig::load
[09:05:33]Found copy of config file on SD - copying that to SPIFFS
[09:05:33]copy_file "/fnconfig.ini" -> "/fnconfig.ini"
[09:05:33]copy_file copied 539 bytes
[09:05:33]fnConfig::load read 539 bytes from config file
[09:05:33]WIFI_EVENT_STA_START
[09:05:33]WiFi connect attempt to SSID "mytek"
[09:05:33]esp_wifi_connect returned 0
[09:05:33]disk UNMOUNT
[09:05:33]disk MOUNT
[09:05:33]ATR MOUNT
[09:05:33]mounted ATR: paragraphs=5760, sect_size=128, sect_count=720, disk_size=0
[09:05:34]Creating a default printer using FS_SDFAT storage and type 1
[09:05:34]SSH client initialized.
[09:05:34]ModemSniffer::ModemSniffer(FS_SDFAT)
[09:05:34]SIO SETUP
[09:05:34]Set HSIO baud from 0 to 124017 (index 0), alt=126674
[09:05:34]Available heap: 3894620
[09:05:34]Setup complete @ 612 (608ms)
[09:05:34]WIFI_EVENT_STA_CONNECTED
[09:05:34]IP_EVENT_STA_GOT_IP
[09:05:34]Obtained IP address: 192.168.1.27
[09:05:34]SNTP client start
[09:05:34]Starting web server on port 80
[09:05:38]SNTP time sync event: Sat Mar 20, 09:05:38 2021 -0700

 

Edited by mytek
Updated Schematic - See note.
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Hi!

 

Justed place an order for one. Can’t wait to try it out. I’ve got an idea for a software project and I wonder if there’s a bit of documentation on how to use it in our own Asm/basic programs?

Edited by Tuxon86
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8 minutes ago, Tuxon86 said:

Hi!

 

Justed place an order for one. Can’t wait to try it out. I’ve got an idea for a software project and I wonder if there’s a bit of documentation on how to use it in our own Asm/basic programs?

There's a lot of information on the wiki https://github.com/FujiNetWIFI/fujinet-platformio/wiki

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On 3/16/2021 at 2:25 PM, mozzwald said:

This thread is for hardware discussion. Please start a new thread or use the Testing and Bug Reporting thread and provide serial debug output while trying to access a TNFS server. You can use the FujiNet Flasher to capture this information.

Hmmm, I am not a frequent visitor of AtariAge to easily navigate, which type of issue where belongs. Can be answered my question simply there where I asked for?

Thank you, and sorry for confusion.

Peter

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3 hours ago, KPeter said:

Hmmm, I am not a frequent visitor of AtariAge to easily navigate, which type of issue where belongs. Can be answered my question simply there where I asked for?

Thank you, and sorry for confusion.

Peter

Dude. Obstinance will not get you what you want. Please, post to the Bug Reporting Thread that both @mozzwald and I just linked to, right here, in this sentence, or start a new thread. This thread is for hardware development discussion.

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  • 2 weeks later...
On 3/19/2021 at 1:35 PM, mytek said:

It's a start. Essentially you would be looking for a change in the detect switch from a high state to a low state, and when seen, initiate a safe reset. That should automatically mount the new card in the socket same as if I pressed the safe reset button after inserting a card.

I've implemented SD Card detection via interrupt in the latest firmware update if you could please test it. If the card is removed, Fujinet will safe reset. If card insertion is detected it will start the SD Card service (it does not mount any disk slots, but the card is available to use with config/config tools).

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On 3/15/2021 at 1:08 AM, mytek said:

So based on what I was seeing, it suggests that the ADC is not getting read, and that the 4.78 is a fixed response

I did some digging into the SIO voltage issue and found a fancy chart showing the ADC voltage curve. The top end levels off so the reported voltage on the high end will be wrong. I wonder if we change the voltage divider to be lower and adjust the calculation then maybe get a closer result. I also added a 0.1uF capacitor as suggested on the linked page but it made no difference.

 

FWIW, the page also talks about the calibration value and I confirmed my esp32 has the efuse burned from the factory with a default value of 1064 which is indeed being used instead of the 1100 default. I think most if not all FujiNets in the wild should have this value burned in them since they are probably all newer modules.

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22 hours ago, mozzwald said:

I've implemented SD Card detection via interrupt in the latest firmware update if you could please test it. If the card is removed, Fujinet will safe reset. If card insertion is detected it will start the SD Card service (it does not mount any disk slots, but the card is available to use with config/config tools).

Sorry I've been gone for a while and just saw your new posts a little while ago. So coinciding with this I also assembled a V1.5 NUC-FujiNet prototype board which incorporates the card detect switch connection, flashed it with the new firmware, and then started testing. Good News!!! It works as advertised each and every time I hot plug either the same card or swap it with another while the system remained powered up. This is a very slick feature, thank you ?

 

9 hours ago, mozzwald said:

I did some digging into the SIO voltage issue and found a fancy chart showing the ADC voltage curve. The top end levels off so the reported voltage on the high end will be wrong. I wonder if we change the voltage divider to be lower and adjust the calculation then maybe get a closer result. I also added a 0.1uF capacitor as suggested on the linked page but it made no difference.

Let me know, and I'll change my divider values, and give any firmware updates a test.

 

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On 4/2/2021 at 7:15 PM, mytek said:

Let me know, and I'll change my divider values, and give any firmware updates a test.

I've changed my resistor divider to 1.2k & 2k which puts the high voltage around 3.125 volts. My bench power supply and DMM confirmed good results. A new firmware update was just pushed with updated calculation for v1.6 hardware. I also added debug output that shows what is being used as the voltage reference calibration: efuse, two-point or default.

 

When you get a moment, could you swap your resistors and give it a test? Thanks!

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6 hours ago, mozzwald said:

When you get a moment, could you swap your resistors and give it a test? Thanks!

I would if I could but I'm 150 miles away from home and won't get back until Wednesday night. But first thing in the morning Thursday I'll give it a go.

 

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15 minutes ago, chad5200 said:

I have a friend interested in purchasing a FujiNet.

 

He is in no rush... so should he wait until hardware version 1.6 (or whatever it ends up being) is available?

 

I do not wish to hijack the thread, but I will answer quickly:

Short answer, if he wants to use FujiNet with lots of existing peripherals, the upcoming hardware release improves the bus coupling alongside other SIO devices. This isn't as big of an issue with 99% of users, because, ironically, #FujiNet provides every single peripheral that you would use alongside it.

All of the versions of FujiNet run exactly the same firmware, and have exactly the same feature set.

 

-Thom

 

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On 4/6/2021 at 5:49 PM, mozzwald said:

I've changed my resistor divider to 1.2k & 2k which puts the high voltage around 3.125 volts. My bench power supply and DMM confirmed good results. A new firmware update was just pushed with updated calculation for v1.6 hardware. I also added debug output that shows what is being used as the voltage reference calibration: efuse, two-point or default.

 

When you get a moment, could you swap your resistors and give it a test? Thanks!

Here are my test results using 1.2K and 2K (both 1% tolerance) in voltage divider with latest firmware release. It's way better than before, being within 3% of actual. I'd say pretty darn close and call it a day. Thank you :) .

 

WEB UI

FN_Hardware_pane.thumb.png.d2531f3eb69bd61b980135e6a1e4a80f.png

 

ACTUAL SIO VOLTAGE

(being tested on a 576NUC+ which sees some voltage drop due to the filter circuit and the power MosFet switch)

SIO_volts.JPG.f13e6140bbdecc63b4341f8ada8482cb.JPG

 

VOLTAGE DIVIDER OUTPUT

V_divider_OUT.JPG.f88bffc773a731ff7b03ca2e45ad3ca7.JPG

 

Voltage_divider_calc.thumb.png.c77f63812e7ff2877732e0d8327d3c65.png

 

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1 minute ago, tschak909 said:

HP... when they really were the "getting shit done for engineers so engineers can get shit done" company. :)

Yeah it's a extremely accurate digital multi-meter which I'm glad to own. Traded a 35mm Nikon SLR with motor drive for it about 20 years ago, and never regretted that decision.

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  • 2 weeks later...

There was some more chat on the FujiNet discord tonight about a FujiNet inside the 1030. I played around a bit more with the layout and this is what I came up with (nothing is routed, just component placement and very rough at that): 

1030F-preview.thumb.jpg.6d027465f9fdcef28ba3c73eb7cd75ca.jpg

You can see the original board outline in the image above. The front panel (IMO) is where the buttons and SD slot should be, but others may beg to differ :). My idea is to make a 3D printed jig that fits over/in the front panel with holes that are to be drilled out for the buttons and SD slot. One existing LED will be for SIO activity and the other existing LED a bi-color LED for WIFI and BT status. There was a recommendation to put the SD in the back where a SIO receptacle is instead. While I can understand that, it still doesn't seem right. I'm open to ideas still.

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