Assembly: Why does DIV of an integer by itself result in an overflow?

[Tim Hamilton]

I'm learning assembly, and in reading the Editor/Assembler manual for the DIVision statement, I was surprised to find that if the divisor and dividend are equal, DIV doesn't return 1 with remainder=0.  It sets the overflow bit.

 

I assume that the DIV statement works by repeated subtractions.  So I would naively expect that, say, 5/5 would involve subtracting 5-5, incrementing the quotient to 1, and checking the remainder (0).  Why does it cause an overflow, instead?

 

(I don't know if this is really appropriate for the Development sub-forum, but I thought it might be because of getting into the nuts and bolts of the CPU.   Apologies if it's in the wrong place.)

 

Related:  I have found an error in the E/A manual for the AB command that isn't listed in the Erratum.  Is anybody compiling a list of additional E/A manual errata here?

 

[matthew180]

It is because the division is really a 32-bit value divided by a 16-bit value, and the answer has to fit in a 16-bit quotient and 16-bit remainder.  The dividend (number being divided) is 32-bit, and the divisor is 16-bit.  The rule is, the divisor must be greater-than the most-significant 16-bit word of the dividend.

 

5 / 5 should be fine.  Did you try it?  What will not work is something like: 0x8FFFF / 0x4, since the answer quotient will not fit in the 16-bit result.

Edited June 30, 2020 by matthew180

[+Lee Stewart]

50 minutes ago, Tim Hamilton said:

I'm learning assembly, and in reading the Editor/Assembler manual for the DIVision statement, I was surprised to find that if the divisor and dividend are equal, DIV doesn't return 1 with remainder=0.  It sets the overflow bit.

 

You are setting it up wrong if that is the answer you get. Using only registers to divide 5 by 5:

       LI   R1,5      load divisor
       CLR  R2        zero left word of dividend
       LI   R3,5      load right word of dividend
       DIV  R1,R2     do the division

R2 has the quotient (1) and R3, the remainder (0).

 

...lee

[matthew180]

Here is a longer explanation about the div instruction and why certain ranges of numbers will overflow:

 

https://atariage.com/forums/topic/162941-assembly-on-the-994a/?do=findComment&comment=2732413

 

Basically if you use the 9900 divide as a 16-bit by 16-bit divide, it will always work as expected.  As soon as you use a dividend larger than 16-bits, you have to pay attention.

Edited June 30, 2020 by matthew180