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BillG

Cycle counting question

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11 hours ago, TheBF said:

Classic99 debugger shows cycles in the dis-assembler.

In your opinion, is it accurate?

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Whenever I have looked closely it seems so. @Tursi, the author, is a computer professional, working in industry.

 

Maybe he can weigh in here.

 

 

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My head is spinning and this is how I plan to make it stop.

 

1. I choose this as the authoritative document.  Appendix A of:  

https://ia801205.us.archive.org/14/items/bitsavers_tiTMS9900MstemDevelopmentManual1977_4482262/MP702_TMS9900_Family_System_Development_Manual_1977.pdf

 

2. It speaks in terms of machine cycles.  A machine cycle consists of two clock cycles.  This was a source of much of my confusion as some numbers appeared to be off by half or double.  They were.

 

3. My assembler will distinguish only between workspace accesses and all other memory accesses (including instruction opcode and immediate operand fetches) and allow specifying whether each is in fast or slow memory.  It will assume a 99/4A platform in which all slow memory accesses incur a penalty of four additional clock cycles.  The default is fast workspace and slow other memory.

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Your first item should be good. It states the same data as three other references I have, the Fundamentals of microcomputer design, System hardware and software, by Texas Instruments learning center, 1982, The 9900 family data book, by Texas Instruments semiconductor group, 1981 and the Microsystems designer's handbook, also from 1981.

 

Being able to specify memory speed yourself is a good idea. It means the count can be correct for a computer like mine too, where 32 K RAM expansion is 16-bit wide, no wait state too.

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17 hours ago, BillG said:

In your opinion, is it accurate?

In my opinion, it's accurate. I used that cycle counting to play back audio and video at correct rate on hardware.

 

GROM cycle delay is the only thing that is approximated right now. I don't take into account the differences between the various internal GROM states.

 

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