List of Memory Locations Used by Peripherals?

[Daedalus2097]

Is there a comprehensive list anywhere of the various peripherals available (old and new) and the memory locations they map to? For example, it would appear that the $D500-$D7FF region is a good place to put experimental hardware as I don't think it can be used for RAM and the decodes for the region (well, $D600-$D7FF) aren't connected on the XL. However, reading the Altirra hardware manual seems to suggest that some RAM expansions bank extra RAM over this region, which would make them incompatible.

 

Lotharek's COVOX product appears to have the option of being mapped to $D5xx, D6xx or D7xx space, which is good to know, but it would be useful to have a decent list of all peripherals so I don't have to try and find that sort of information on them all...

 

Thanks

Edited September 15, 2020 by Daedalus2097
Edit: $D4xx->$D5xx

[Rybags]

I doubt anything would map to $D4xx - that's Antic which self-decodes and can't be altered.

Same with most of the other default IO space though in some cases there's extra functionality piggybacked to existing space e.g. for VBXE (GTIA addresses) or Ultimate 1 Meg (PIA addresses) - usually done in a way where accesses won't affect normal operations.

 

The $D5xx area is usually reserved for cartridge and 800 expansion board use but is "borrowed" by some peripherals and addons.

VBXE gives the option ot use $D6xx if conflict exists.

 

The PBI specification has $D1xx as IO space for such devices and also allows the FP ROM ($D800-$DFFF) to be switched out and replaced by whatever the peripheral wants to put there, like RAM, IO space, ROM.

Additionally the PBI hardware allows external override to most addresses (except IO space $D000-$D7FF ?) - an example of use there is 320XL which can replace all of system RAM in 64K and under machines.

[Daedalus2097]

Ah, sorry, the $D4xx was a typo, it is indeed $D5xx, 6xx or 7xx. Yeah, $D5xx would mean incompatibility with cartridges, I guess it's an option for when $D6xx and D7xx are already in use elsewhere.

 

The $D1xx space is interesting, I'll check it out as it was potentially PBI I/O hardware I was thinking of. Overriding internal addresses is all well and good, but if I override, say, an area of RAM, how do I let BASIC know it's no longer available for use? Sounds like $D1xx is what I'm looking for though, provided nothing else uses it...

 

Thanks very much for that! I wonder is there a suitable place to add a list of peripherals and their addresses for reference, maybe an A8 hardware wiki or similar?

[drac030]

I am afraid that there is plenty of devices (HDD interfaces, mainly) which use $D1xx. But yours should not conflict as long as the registers are activated and deactivated according to the corresponding bit in $D1FF register set or cleared. But still, some devices, even if they map and unmap the I/O registers on $D1xx as they should, may also keep specific control registers mapped there all the time, it depends on the actual device.

 

[Daedalus2097]

Yeah, that's where a Wiki or database would come in useful, to see which bits and registers are used by which hardware devices and which are potentially free. But maybe having $D6xx and $D7xx as options with external decoding would do the job.

 

Incidentally, if you were to connect multiple PBI devices to the machine, how would you do that? Is there normally a pass-through connector on HDD interfaces? Or is there an external busboard of sorts?

[TGB1718]

58 minutes ago, Daedalus2097 said:

The $D1xx space is interesting,

I made an RS232/Parallel printer interface for my 130XE, I think I used $D1XX/$D2XX addresses, think I may still have the code somewhere

will dig it out and post it if I can find it, It's not that big as much of the processing/decoding was done in hardware

[Daedalus2097]

Awesome, I'd really appreciate it if you could dig that up. I was thinking of building an Atari - Amiga "clock port" interface, which could open up access to a wide variety of peripherals easily accessed through an 8-bit bus and a handful of registers. That would include parallel and serial interfaces, I2C and SPI controllers, ethernet modules, hardware MP3 decoders etc. It should be easily enough done with a few latches and gates, or maybe a small CPLD depending on exactly what it ends up looking like.

[drac030]

24 minutes ago, Daedalus2097 said:

Incidentally, if you were to connect multiple PBI devices to the machine, how would you do that? Is there normally a pass-through connector on HDD interfaces? Or is there an external busboard of sorts?

I know one device which has the pass-through connector, it is the parallel Karin-Maxi floppy drive. It has two CART/ECI connectors, so effectively three PBI devices may be attached at a time. Couting the Rapidus accelerator in, four IDE+ does not have the pass-through connector, but other HDD interfaces may do.

 

There were also several attempts (I know of) to build a separate board which could contain multiple PBI connectors, but I am not sure if any of these projects has been finished.

 

[+DrVenkman]

38 minutes ago, Daedalus2097 said:

Yeah, that's where a Wiki or database would come in useful, to see which bits and registers are used by which hardware devices and which are potentially free.

If you haven’t already, get a hold of a copy of @phaeron’s Altirra Hardware Reference Manual. It’s about the closest thing around to a one-stop-shop for all kinds of hardware data. 

 

[TGB1718]

I found this, not sure if it's the finished article, but will give you an idea of what I did, MAC65 was used

I used addresses D101 to D107, this is the RS232 code, parallel printer was similar and used the same port addresses,

main difference was I moved ROM to RAM under the ROM and overwrote the Atari printer handler with my code, so left

all the normal RAM free. 

 

See this :- 

 

0100 ; RS232 HANDLER
0110 ; 01-DEC-1992
0120     .OPT NO LIST
0130     .MACRO INSERT 
0140     LDY #0      ;INSERT HANDLER IN TABLE
0150 FLOOP LDA $031A,Y
0160     BEQ FOUND
0170     INY 
0180     INY 
0190     INY 
0200     CPY #34
0210     BNE FLOOP
0220     SEC 
0230     RTS 
0240 FOUND LDA #'R
0250     STA $031A,Y
0260     LDA #RTABLE&255
0270     INY 
0280     STA $031A,Y
0290     LDA #RTABLE/256
0300     INY 
0310     STA $031A,Y
0320     CLC 
0330     RTS 
0340     .ENDM 
0350 ;   .OPT NO LIST
0360 ;   .OPT OBJ
0370 ; RS232 CODE
0380 XR  =   $D105
0390 STAT =  $D101
0400 DATA =  $D102
0410 TRAN =  $D103
0420 LATCH = $D104
0430 STROBE = XR     ; RS232 RESET
0440 ENBUSY = $D106
0450 RDAV =  $D107
0460 EOL =   $9B
0470 RSBUSY = $10
0480 XON =   $11
0490 XOFF =  $13
0500 CR  =   $0D
0510 LF  =   $0A
0520 TBMT =  $10
0530 DAV =   8
0540 OR  =   4
0550 FE  =   2
0560 PE  =   1
0570     *=  $0600
0580      INSERT  ; insert handler into table
0590 ;
0600 ;
0610 ;
0620 ;
0630 ;
0640 ;
0650 ;
0660 ;
0670 ;
0680 RTABLE .WORD ROPEN-1
0690     .WORD ROPEN-1 ;CLOSE
0700     .WORD RGET-1
0710     .WORD RPUT-1
0720     .WORD RSTAT-1
0730     .WORD RSPEC-1
0740     JMP RINIT
0750 ROPEN LDY #1
0760     STY RDAV
0770     STY XR
0775     STY LATCH
0780     RTS 
0790 RGET LDA STAT
0800     STX XTEMP
0810     AND #DAV
0820     BNE GOTDATA
0830     LDA #20
0840     STA COUNT
0850     LDY #0
0860     LDX #0
0870 GETLOOP LDA STAT
0880     AND #DAV
0890     BNE GOTDATA
0900     DEX 
0910     BNE GETLOOP
0920     DEY 
0930     BNE GETLOOP
0940     DEC COUNT
0950     BNE GETLOOP
0960 ERROR LDX XTEMP
0970     LDY #138
0980     RTS 
0990 GOTDATA LDA DATA
1000     STA RDAV
1005     STA LATCH
1010     LDX XTEMP
1020     LDY #1
1030     RTS 
1040 RPUT NOP 
1050     STX XTEMP
1060     STA XR      ;SHOULD BE RDAV
1070     LDA #20
1080 BSY STA COUNT
1090     LDA ENBUSY
1100     AND #$10
1110     BEQ NODLY
1120     JSR DLY
1130     LDA COUNT
1140     SBC #1
1150     BNE BSY
1160     JMP CHKERR
1170 NODLY LDA ATEMP
1180     STA LATCH
1190     STA TRAN
1200     LDX XTEMP
1210     LDY #1
1220     RTS 
1230 CHKERR LDX XTEMP
1240     LDY #139
1250     RTS 
1260 RSTAT CLC 
1270     LDA ENBUSY
1280     AND #$10
1290     ROL A
1300     STA ATEMP
1310     LDA STAT
1320     AND #$1F
1330     ORA ATEMP
1340     TAY 
1350     RTS 
1360 RSPEC LDY #1
1370     RTS 
1380 DLY LDX #0
1390     LDY #0
1400 DLY1 DEX 
1410     BNE DLY1
1420     DEY 
1430     BNE DLY1
1440     RTS 
1450 COUNT .BYTE 0
1460 XTEMP .BYTE 0
1470 ATEMP .BYTE 0
1480     .OPT LIST
1490 RINIT JMP ROPEN
1500     .OPT NO LIST
1510 CHECKBUSY LDA STAT
1520     TAX 
1530     AND #$10
1540     BEQ CHECKBUSY
1550     LDA ENBUSY
1560     AND #$20
1570     BNE NOTBUSY
1580     LDX #0
1590     LDY #10
1600 X2  LDA ENBUSY
1610     AND #$20
1620     BNE NOTBUSY
1630 X1  DEX 
1640     BNE X2
1650     DEY 
1660     BNE X2
1670     LDY #139
1680     RTS 
1690 NOTBUSY LDY #1
1700     RTS 

Edited September 15, 2020 by TGB1718
Added Link

[TGB1718]

Found the Centronics printer code too, this one is a little more complex

 

 

PrintXE.asm

[Rybags]

The PBI specification insofar as the logical interface was versatile in that it allowed some sharing of $D1xx addresses as well as selectively banking into the FP Rom space.

Of course it wasn't really utilized since the 1090 never went beyond proto and no machines were released with slot based expansion.

 

Additionally - some flash cartridges I believe the Atarimax ones at least - use specific addresses within the $Axxx-$Bxxx range for doing flash operations like erase and writing blocks.

[Daedalus2097]

Awesome, thanks everyone, lots of great information here. A quick skim through the Altirra manual looks promising, seems to be lots of relevant detail. And that RS232 project looks excellent  I shouldn't need to worry about swapping out the FP region, it'll be pretty simple I/O stuff that I'd be doing.

 

The 1090 I hadn't heard of, but atarimuseum.com has schematics and some design notes available that might be helpful too, especially for passthrough-type implementations.

[drac030]

23 minutes ago, Rybags said:

Of course it wasn't really utilized

The Karin-Maxi and IDE+ (which I mentioned above), and several other devices I believe, use $D1xx and do not conflict when inserted at the same time because of using the sharing mechanism you seem to be speaking of. So I am not sure if it can be said that it was "never really utilized"...

[Daedalus2097]

Looking at the 1090 schematics, there isn't anything there for bus arbitration, meaning the $D1FF scheme can easily be implemented by the devices themselves (and their software). There's actually nothing in there but some buffers and a power supply, but there's some good documentation on the addressing scheme which is very interesting and will come in useful.

 

As an aside, it's a pity the pinout of the slots in the 1090 isn't a mirror image of the PBI connector, otherwise reimplementing it with a small gender-changing PCB to plug into the slots would give you the ability to use both PBI and 1090 boards in the same setup. Something similar would still be possible though... Are there enough PBI devices out there that being to connect them all at once is a problem?

[drac030]

2 hours ago, Daedalus2097 said:

the $D1FF scheme can easily be implemented by the devices themselves (and their software)

Exactly.

 

2 hours ago, Daedalus2097 said:

the ability to use both PBI and 1090 boards in the same setup. Something similar would still be possible though...

It is yet worse, because the XE machines have a completely different PBI connector (known as CART/ECI). Therefore e.g. the (already several times mentioned) IDE+ interface has two connectors, one for 800XL, the other for 130XE.

 

A standalone card docking device (like 1090 was meant to be) with an additional ability to house standalone devices in the slots would be very nice, but as far as I know nobody has so far successfully built such a thing. It is probably not much wanted anyways and most PBI devices are HDD interfaces, where one such device is sufficient for most uses. But it is also sort of chicken and egg problem: there is no expansion box needed, because there are no expansion boards, and there are no expansion boards, because there is no expansion box. Someone may build one, but then some expansion boards must be designed so that the expansion box would immediately have some use... then you wait 20 years before people stop looking at the thing as at a terrible novelty (such as VBXE, it was designed about 15 years ago if I am not mistaken, so it is already longer on the market than the entire Atari 8-bit line ever was)... and so on.

 

Edited September 15, 2020 by drac030

[Daedalus2097]

Heh, maybe I'll put it on the list of projects for if I ever finish everything else I'm working on  Yeah, the ECI thing is kinda annoying, but that should be a pretty simple PCB to convert to PBI, right? Or vice versa. For such a bus device, a simple PCB or cable that allows connection to either type would be a no-brainer to include I'd say.

[ivop]

 

[flashjazzcat]

Brilliant. That's the thread I was looking for the other day but couldn't find.

[+CharlieChaplin]

$D000 - $D01F CTIA/GTIA (stock hardware)
$D020 - $D03F reserved for second GTIA
$D040 - $D05F reserved for third GTIA
$D080 - $D0FF VBXE soft reset area

 

$D000 - D01F  1st GTIA   (Red)

$D020 - D03F  2nd GTIA   (Green)

$D040 - D05F  3rd GTIA   (Blue)

$D060 - D07F  4th GTIA   (Black/Greys)

 

Only dreaming...

 

[+Stephen]

2 hours ago, CharlieChaplin said:

$D000 - $D01F CTIA/GTIA (stock hardware)
$D020 - $D03F reserved for second GTIA
$D040 - $D05F reserved for third GTIA
$D080 - $D0FF VBXE soft reset area

 

$D000 - D01F  1st GTIA   (Red)

$D020 - D03F  2nd GTIA   (Green)

$D040 - D05F  3rd GTIA   (Blue)

$D060 - D07F  4th GTIA   (Black/Greys)

 

Only dreaming...

 

If we're going for 4, we'd have to use the Sharp RGB + Yellow technology.  Hey - it was good enough for George Takei to give it an "OH MYYYYYYYYYYYYYYYYYYY!"