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PAL/GAL Jedec map files for TI, Corcomp, Myarc


Fritz442

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Here are the jedec PAL/GAL map files I have, separated into four zip files, for Corcomp, Myarc, TI, Misc:

All GAL files were tested on the GAL16V8D-25LP or GAL20V8B-25LP chips and are working. Included are both PAL and GAL files.

If any issues are found, please let me know.

 

Corcomp Jedec Map Files
------------------------------------------

Corcomp_DSDD_FDC_U6_w-1773_(FDCU6)_PAL.JED

Corcomp_DSDD_FDC_U12_w-1773_(FDCU12)_PAL.JED

Corcomp_DSDD_FDC_U1_w-2793_(DCCU1)_PAL.JED

Corcomp_DSDD_FDC_U2_w-2793_(DCCU2)_PAL.JED

Corcomp_MES_(REV-E)_Lower_U2_(LB1A)_w-o FDC_PAL.JED
Corcomp_MES_(REV-H)_Lower_U2_(LB1A)_w-FDC_PAL.JED

Corcomp_MES_(UK002)_Upper_U9_(UB1A)_w-FDC_PAL.JED

Corcomp_MES_(UK002)_Upper_U10_(UB2B)_w-FDC_PAL.JED

Corcomp_MES_(UK002)_Upper_U11_(UB3A)_w-FDC_PAL.JED

Corcomp_32K_StandAloneUnit_U1_(UB3A)_PAL.JED

Corcomp_RS232_(REV-C & F)_U8_PAL.JED

Corcomp_Triple_Tech_U7_(2CLKA)_PAL.JED

Corcomp_Triple_Tech_U23_(2-3TA)_PAL.JED

Corcomp_256k-512k_Memory_Plus_U24_(MP3C)_PAL.JED

Corcomp_256k-512k_Memory_Plus_U25_(MP2C)_PAL.JED

 

Myarc Jedec Map Files
------------------------------------------

Myarc_MEXP-1_32K-128K-512K_PAL.JED

Myarc_RSC-1_RS232_PAL.JED

Myarc_Geneve_9640_Video_PWB_EW001_U202_PAL.JED

Myarc_Geneve_9640_TURBO_Video_PWB_EW001_U202_PAL.JED

 

TI99 Jedec Map Files
------------------------------------------

TI_PHP1220_RS232_PAL.JED
TI_PHP1240_FDC_PAL.JED
TI_PHP1260_32K_PAL.JED
TI_PHP1270_P-CODE_PAL.JED

 

Misc Jedec Map Files
------------------------------------------

DataBioTics_TI-Workshop_16R4_PAL.JED

Rave99_Speech_Adapter_SPA-01_U1_TI994A_GAL.JED

 

 

 

Corcomp_PAL-GAL_JEDEC_MAP_FILES_1-23-2024.zip Myarc_PAL-GAL_JEDEC_MAP_FILES_1-23-2024.zip TI_PAL-GAL_JEDEC_MAP_FILES_1-23-2024.zip MISC_PAL-GAL_JEDEC_MAP_FILES_1-23-2024.zip

Edited by Fritz442
!! Updated Zip Files !!
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19 hours ago, Fritz442 said:

Hey all,

I am in need of some PAL\GAL chip testers. I have manually decoded the following PAL's:

 

...

 

What I need is people that can program these into some GAL16V8 chips and install them on boards to test.

I have tested all them on my boards successfully but would like more board testing. I have both the

PAL and GAL converted files.

Please PM me if you can test any of these. :thumbsup:

I have some GAL16V8, can program, but I can only try the TI cards.

 

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The boolean equations are the source code. For example, you have input pins i1 and i2, and output o1 = i1 AND i2. The output o1 is defined by this equation. I programmed GALs 30 years ago (created my speech synthesizer adapter board this way), and I don't remember all details.

 

Wikipedia says that the Jedec files (.jed) contain the matrix of fuses of the PAL/GAL. A compiler produces this jedec file from the equations. It seems as if you reverse-engineered these matrices, but it should be easy to derive the equations from the matrix.

 

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Yes I see what you are saying, but no...I'm not looking at AND's, OR's or any of that. I'm simply cycling the inputs to

get an output pin to go low and write down the each input switch position. I'm not compiling anything, just entering them

into the PAL.jed file as 0's and 1's. Then converting them to GAL.jed with PALTOGAL.exe to write them to 16V8 chip.

Not a very Hi-Tech way of doing this...but it seems to work.  :) LOL :)

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I'm used to starting with WinCUPL... 

 

I managed to desolder one of the TI chips from the board... man those are tight against the PCB... resorted to hot air after the de-soldering tool wasn't good enough... Sadly I only have one socket on hand... but I did find a stock pile of ATF16V8...  :)  

 

JED2EQN sounds interesting... gonna have to take a look at that. ( except you need a retro computer to run it )

 

 

 

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3 hours ago, mizapf said:

There seems to be a tool JED2EQN, but I have not yet found out where to get it.

JED2EQN is part of National Semiconductor's OPALjr package which you can download from [http://www.brouhaha.com/~eric/retrocomputing/mmi/palasm/opaljr21.zip]. I got the link from this page: [https://www.uchobby.com/index.php/2008/03/30/gals-for-electronics-hobby/].

 

I use the OPALjr package (EQN2JED) to compile the GAL for the Mini Cortex. You need to either run it on an old DOS computer, or I use DOSBox under Windows. You only need to extract the DEVICE.LIB, EQN2JED.EXE (or JED2EQN.EXE) and MANUAL.TXT files from the zip file - you don't need to use the installer.

 

Just tried JED2EQN with a .jed file I had set up to clone a 74LS138 - wasn't entirely successful as it said the /Y0 output was connected to GND ...

 

 

Edited by Stuart
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On 10/26/2020 at 7:34 AM, Ksarul said:

In the case of the TI cards, the original JEDEC equations are available in several of the documents on WHT (I put them there many years ago). That should give you a good comparison set to verify the four TI cards in your list.

This would be awesome, except you said it is on WHT, and years ago... which I assume is a 3 letter filesystem name for http://ftp.whtech.com... The communities very own write only memory.

(I'm only partly sorry for writing that... I dream of giving up on software development and spending a decade exploding that archive of archives out to search engine friendly content.) 

 

Any idea, what they'd be called in the sitelist.txt? 

 

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http://ftp.whtech.com/datasheets and manuals/Specifications/Peripheral Expansion System Theory Of Operation and Technical Traning Guide 1982-09-03.pdf

 

Oh, I have never looked in that one before... Always assumed it was just about a power supply and backplane. 

 

That is a rich doc! About all of the individual peripherals from TI in great detail. 

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12 hours ago, jedimatt42 said:

http://ftp.whtech.com/datasheets and manuals/Specifications/Peripheral Expansion System Theory Of Operation and Technical Traning Guide 1982-09-03.pdf

 

Oh, I have never looked in that one before... Always assumed it was just about a power supply and backplane. 

 

That is a rich doc! About all of the individual peripherals from TI in great detail. 

I'm glad you like it. Restoring that one was a lot of slow work, as the original was nearly illegible at various points.

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On 10/25/2020 at 10:09 PM, mizapf said:

There seems to be a tool JED2EQN, but I have not yet found out where to get it.

This is all part of the OPAL programs used with some GAL programmer described in Elektor some where in the 1990.s. I have these programs and still use it  and run it in DosBox. Never used JED2EQN myself ... didn't know I had it until I looked just now.

 

Opal.zip

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I tried it, and it seems to work (in dosbox).

 

This is the output of JED2EQN for the RS232 PAL:

 

; JED2EQN -- JEDEC file to Boolean Equations disassembler (Version V063)
; Copyright (c) National Semiconductor Corporation 1990-1993
; Disassembled from rs232.jed. Date: 10-27-120

chip rs232 PAL12L6

i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11 i12=12
o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 i19=19 VCC=20

equations

/o18 = /i2 * /i3 * /i19 * i4 * /i5 * /i6 * i7 * i8 * i12 * /i9 * i11
/o17 = /i2 * /i3 * /i19 * i4 * /i5 * /i6 * i7 * /i8 * i12 * i9 * i11
/o16 = /i2 * /i3 * /i19 * i4 * /i5 * /i6 * i7 * /i8 * i12 * /i9 * i11
/o15 = /i2 * i1 * i3 * i4 * i12 * /i11
/o14 = /i2 * i1 * i3 * i12 * /i11
/o13 = /i2 * i1 * i3 * /i4 * i12 * /i11

 

 

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I just looked at the RS-232 equations. Outputs O13, O14, and O15 are correct. O16, O17, and O18 are half right. There are two separate sets of logical conditions for each of these last three outputs (an OR state), and the equation only identifies the first one. See page 5-16 of the document I linked to earlier. Note also that TI expected the input to be active low for some of the signals, so you have to pay attention to the states on those inputs/outputs in the document.

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8 hours ago, Ksarul said:

I just looked at the RS-232 equations. Outputs O13, O14, and O15 are correct. O16, O17, and O18 are half right. There are two separate sets of logical conditions for each of these last three outputs (an OR state), and the equation only identifies the first one. See page 5-16 of the document I linked to earlier. Note also that TI expected the input to be active low for some of the signals, so you have to pay attention to the states on those inputs/outputs in the document.

Yes TY Jim, I will be going back over these files again and have repaired the TI RS232 files.

Many I have done have multiple conditions\patterns that I have seen. This is why I NEED testers

before we post these files. :)

 

I have also added the 2 Triple Tech PAL's to the list.

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here's the TI-FDC

 

; JED2EQN -- JEDEC file to Boolean Equations disassembler (Version V063)
; Copyright (c) National Semiconductor Corporation 1990-1993
; Disassembled from TIFDC_P.JED. Date: 11-1-120

chip TIFDC_P PAL12L6

 

i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i12=12 o13=13
o14=14 o15=15 o16=16 o17=17 i19=19 VCC=20

 

equations

/o17 = /i2 * /i3 * /i4 * i5 * i7 * i8 * i12 * i9
/o16 = /i2 * i1 * i3 * /i19 * /i4 * i5 * i6 * /i8 * i9
/o15 = /i2 * i1 * i3 * /i4 * i6 * /i8 * i9
/o14 = /i2 * i1 * i3 * i19 * /i4 * i5 * i6 * /i8 * i9
/o13 = /i2 * i1 * i3 * /i4 * /i5 * i6 * /i8 * i9

 

 

Look at output 17, I have i8 as HIGH, the PDF has i8 as LOW.

I wrote a GAL with input 8 LOW and it does not detect any drives.

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Here's the TI-32K, seems to be the same.

 

; JED2EQN -- JEDEC file to Boolean Equations disassembler (Version V063)
; Copyright (c) National Semiconductor Corporation 1990-1993
; Disassembled from TI_32K_P.JED. Date: 11-1-120

chip TI_32K_P PAL12L6

 

i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11 i12=12
o13=13 o14=14 o15=15 o16=16 o18=18 i19=19 VCC=20

 

equations

/o18 = i8
/o16 = i5 * i7
/o15 = i19 * i9
    + i12 * i11
/o14 = i2 * i1 * i3 * i4 * i5 * i6 * /i8
    + i2 * i1 * i3 * i4 * /i6 * i7 * /i8
/o13 = /i19 * i9
    + /i12 * i11

Edited by Fritz442
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And the P-code. :)

 

; JED2EQN -- JEDEC file to Boolean Equations disassembler (Version V063)
; Copyright (c) National Semiconductor Corporation 1990-1993
; Disassembled from TI_PCD_P.JED. Date: 11-1-120

chip TI_PCD_P PAL12L6

 

i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11 i12=12
o13=13 o14=14 o15=15 o16=16 o17=17 i19=19 VCC=20

 

equations

/o17 = /i2 * /i3 * i4 * i5 * /i6 * /i8 * i12 * i11
/o16 = /i2 * i1 * i3 * /i19 * i4 * i6 * /i7 * i12 * i9 * /i11
    + /i2 * i1 * i3 * i19 * i4 * i6 * /i7 * i12 * /i9 * /i11
/o15 = /i2 * i1 * i3 * i12 * /i11
/o14 = /i2 * i1 * i3 * /i4 * i12 * i9 * /i11
/o13 = /i2 * i1 * i3 * i4 * /i6 * i12 * i9 * /i11
    + /i2 * i1 * i3 * i4 * i7 * i12 * i9 * /i11

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