+acadiel Posted February 1, 2021 Author Share Posted February 1, 2021 I did a couple today. First is an early September 1981 Schematic, Block Diagram, and timing diagrams for the custom gate array in the CC-40. 1981-September-Gate_Array_Block_Logic_Timing_Diagrams.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 1, 2021 Author Share Posted February 1, 2021 Here's a late September 1981 Schematic and Preliminary Specifications for the CC-40 Gate Array. 1981-Late_Sep-Gate_Array_Schematic_and_Prelim_Specifications.pdf 3 Quote Link to comment Share on other sites More sharing options...
jbdigriz Posted February 3, 2021 Share Posted February 3, 2021 On 2/1/2021 at 4:02 PM, acadiel said: Thirdly, I've given access to the TI Corporate Library at SMU so they can also archive these documents. Unless you guys have other plans, I'm going to suggest that this would be an ideal final repository for any originals you don't plan to keep. 1 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 3, 2021 Author Share Posted February 3, 2021 Unless you guys have other plans, I'm going to suggest that this would be an ideal final repository for any originals you don't plan to keep.A lot of what I’m scanning are second and third generation copies. SMU will likely be looking at it and comparing it to what they have - which are originals. 1 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 9, 2021 Author Share Posted February 9, 2021 These are some custom chip drawings for the Hitachi logic chip - probably for the ALC PLUS (CC-40 Plus) due to the fact that there's cassette mentioned on here. CC-40 - Hitachi Custom Chip Drawings.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 9, 2021 Author Share Posted February 9, 2021 Some handwritten IO Bus schematics and specifications - for the CC-40 Plus CC-40 - IO Bus (Plus) schematic and specifications.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 9, 2021 Author Share Posted February 9, 2021 A 1981 memo about reviewing the Lonestar Keyboard Layout. 1981_August Lonestar Keyboard Layout Memo.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 9, 2021 Author Share Posted February 9, 2021 A handwritten paper with Mike Thompson's comments on the Lonestar Design. Undated. Unknown - Mike Thompson Comments on Lonestar Design.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 9, 2021 Author Share Posted February 9, 2021 A 1980 memo mentioning the gate array review for the Lonestar. (Yeah, shows you just how far they were working on the ALC - the /4A wasn't released yet!) 1980-Lonestar Gate Array Review Memo.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 9, 2021 Author Share Posted February 9, 2021 Apparently an incomplete memo, dated 1981, about evaluating TI's Houston plastic painting factory for the ALC. 1981-Evaluation of TI Houston Plastic Painting Facility Memo.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 9, 2021 Author Share Posted February 9, 2021 A whole slew of miscellaneous ALC/CC-40 documentation. What couldn't really stand on its own got put in this PDF. I still have probably a dozen data sheets and some color hand-drawn layouts for the logic chip that I need to scan, so I'm done done yet! We'll then get into the Wafertape stuff, and then the TI-88 binder. Unknown - ALC Miscellaneous Documents.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 9, 2021 Author Share Posted February 9, 2021 The June 1981 Lonestar block diagram. Here's the graphic from it! 1981-June-Lonestar_Block_Diagram.pdf 4 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 9, 2021 Author Share Posted February 9, 2021 Some Lonestar layout drafts from 1981. 9V batteries? Wow. 1981-June-Lonestar Layout Drafts.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 17, 2021 Author Share Posted February 17, 2021 This is one of the (almost) last CC-40 schematics. This is a "pack" of 23 schematics that were folded with each other, so I scanned them as one document. The first two pages were very rough; the pages were falling apart in the middle. I'm guessing 1982 because that's when some of the schematics were made. 1982-CC-40-Schematic-Pack.pdf 4 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 17, 2021 Author Share Posted February 17, 2021 Unknown date. Here are some hand drawn diagrams and such which were in a packet with each other. Mylars were very hard to scan, but I tried my best since I don't have a backlit scanner. #1 out of 2. Unknown-ALC-CC-40-Hand-drawings-Mylars-1.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 17, 2021 Author Share Posted February 17, 2021 This was on the back of two of the hand drawn diagrams - some defect numbers for the TI2500 and TI59 from the European Consumer Division. 1978_European_Consumer_Div_TI2500_TI59_Defects.pdf 2 1 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 17, 2021 Author Share Posted February 17, 2021 No idea what these are, but this is the second part of the mylars and hand drawn routing. This is the last part of the CC-40 documentation. I do have one HUGE blueprint, which even my scanner isn't large enough to scan. Will need to see if I can locate a poster sized scanner somewhere. Up next: Wafertape! Unknown- Mylars and Schematics.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 17, 2021 Author Share Posted February 17, 2021 The folder I'm in is almost an inch thick... mostly with timing diagrams where they extensively (and I do mean extensively) tested the Wafertape drive to fix a defect. The TL;DR of why the WaferTape wasn't released? The CPU had a bug in it and didn't work with the IDLE instruction. I've attached the relevant memo/assembly below that speaks to that fact. Edit: By the time this bug was identified, TI pulled out of the Home Computer market, and canned whatever work was remaining on the CC-40 and peripherals. From discussions with engineers around this time, the TI-74 reclaimed a lot of this work in 1984 and beyond and was launched within the Calculator division. 1983-Waftertape-failure-root-cause.pdf 3 Quote Link to comment Share on other sites More sharing options...
+FarmerPotato Posted February 19, 2021 Share Posted February 19, 2021 On 2/17/2021 at 3:10 PM, acadiel said: The TL;DR of why the WaferTape wasn't released? The CPU had a bug in it and didn't work with the IDLE instruction. I've attached the relevant memo/assembly below that speaks to that fact. Edit: By the time this bug was identified, TI pulled out of the Home Computer market, and canned whatever work was remaining on the CC-40 and peripherals. From discussions with engineers around this time, the TI-74 reclaimed a lot of this work in 1984 and beyond and was launched within the Calculator division. I'm not so sure. But the first page describes a problem, the second page (reply) details two fixed bugs that don't fit the problem. Their code seems correct as far as I can follow it. MOVP %START,TIMER MOVP %IC2S,IOCNTL select & clear INT2 EINT CLR B IDLE BTJO %SETBIT,B,RSYNC8 I2CS EQU >4C The IOCNTL register: CB is saying the IDLE is not released by INT2, which is enabled. Ryoji replies that there was a bug fixed where clear & select might cause illegal exit from IDLE. But CB does that, and is saying it never exits. Ryoji is saying you normally clear the interrupt, then select it again, because there was a bug with simultaneous select and clear. Wherein it might select but NOT clear. So it would fire immediately instead of IDLEing. The second bug is that when an interrupt is NOT enabled, the IDLE state doesn't service the interrupt (as expected) but the IDLE state exits anyway... Still CB calls this a surprising bug, and Ryoji replies with two bugfixes that don't fit CB's description. If it were me, I would guess the bugfix#1 has caused a new bug. I would break the code into two operations. MOVP %IC2S,IOCNTL select & clear INT2 try EQU I2S >44 MOVP %I2C,IOCNTL clear INT2 MOVP %I2S,IOCNTL select INT2 But I guess we'll never know. It seems hard to believe that nobody ever tested the timer on the 70C20A, unless they only tested it the second way (as Ryoji supposes.) When CB says that the AMPL works, he is talking about the CPU simulator on a TM990/601. The 990 simulates the 70C20 and has a ribbon cable to the CC40. P.S. Where diagram above says 11 is a undefined state, elsewhere the book says it is the"microprocessor mode" which makes the full address space external. In this code, it operates with the internal ROM only (state 01 or >40) which maximizes the pins for GPIO. 1 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 20, 2021 Author Share Posted February 20, 2021 4 hours ago, FarmerPotato said: I'm not so sure. But the first page describes a problem, the second page (reply) details two fixed bugs that don't fit the problem. Their code seems correct as far as I can follow it. MOVP %START,TIMER MOVP %IC2S,IOCNTL select & clear INT2 EINT CLR B IDLE BTJO %SETBIT,B,RSYNC8 I2CS EQU >4C The IOCNTL register: CB is saying the IDLE is not released by INT2, which is enabled. Ryoji replies that there was a bug fixed where clear & select might cause illegal exit from IDLE. But CB does that, and is saying it never exits. Ryoji is saying you normally clear the interrupt, then select it again, because there was a bug with simultaneous select and clear. Wherein it might select but NOT clear. So it would fire immediately instead of IDLEing. The second bug is that when an interrupt is NOT enabled, the IDLE state doesn't service the interrupt (as expected) but the IDLE state exits anyway... Still CB calls this a surprising bug, and Ryoji replies with two bugfixes that don't fit CB's description. If it were me, I would guess the bugfix#1 has caused a new bug. I would break the code into two operations. MOVP %IC2S,IOCNTL select & clear INT2 try EQU I2S >44 MOVP %I2C,IOCNTL clear INT2 MOVP %I2S,IOCNTL select INT2 But I guess we'll never know. It seems hard to believe that nobody ever tested the timer on the 70C20A, unless they only tested it the second way (as Ryoji supposes.) When CB says that the AMPL works, he is talking about the CPU simulator on a TM990/601. The 990 simulates the 70C20 and has a ribbon cable to the CC40. P.S. Where diagram above says 11 is a undefined state, elsewhere the book says it is the"microprocessor mode" which makes the full address space external. In this code, it operates with the internal ROM only (state 01 or >40) which maximizes the pins for GPIO. The interesting part is that those four papers were grouped together. That’s why I scanned them as such. :) Quote Link to comment Share on other sites More sharing options...
+acadiel Posted February 20, 2021 Author Share Posted February 20, 2021 2 hours ago, acadiel said: The interesting part is that those four papers were grouped together. That’s why I scanned them as such. Directly from Steven Reid: "The problem ended up being documentation on one of the bits in IOCNTL being inverted. One bit controlled SLEEP vs HALT when IDLE was executed. It was documented wrong. Change 1 bit and the Wafer tape would have been fine... but discovery made it too late to save it from the axe. Sad. :(" 3 1 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted March 3, 2021 Author Share Posted March 3, 2021 This is the first part of the Art Hunter ("TI-88 Alex binder"). Almost 80 pages of GPD/Chip designations and release dates, including some interesting ones for the Home Computer (referring to Pre-School, which was Early Learning Fun before they renamed it). There is also reference to TMC 1985 (Handheld Unit Transmitter), which is the only place I've seen that part SKU in print so far. 1970s-TI-Chip_GPD_Releases_Art_Hunter.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted March 3, 2021 Author Share Posted March 3, 2021 Here is the second part of the Art Hunter binder. A late 1970's database of ROM numbers for Mainframe (Home Computer) and Calculator ROMs/GROMs/CROMs. 1970s-TI-Calculator_Div_Chip_Number_List_Art_Hunter.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted March 3, 2021 Author Share Posted March 3, 2021 Third part of the Art Hunter binder. Here's a bug report for the TI-55 Calculator in 1978. 1978_TMC-1503D-TI-55-Algorithm_Checkout_Bugs.pdf 3 Quote Link to comment Share on other sites More sharing options...
+acadiel Posted March 4, 2021 Author Share Posted March 4, 2021 Fourth part of the Art Hunter binder. This is the last set of "loose" parts that aren't part of the TI-88 content. This appears to be some kind of checklist (70 pages worth) for TI Calculator chips. Enough for tonight ? 1970s-TI_Calculator_Chip_checklists.pdf 3 Quote Link to comment Share on other sites More sharing options...
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