Blues76 Posted November 27, 2020 Share Posted November 27, 2020 Hi, I hope this was not asked already. I didn’t find anything Why does the status register reserve bit 5 (unused)? what was the thinking ? maybe is internally used ? Quote Link to comment Share on other sites More sharing options...
RevEng Posted November 27, 2020 Share Posted November 27, 2020 Yup, It's used internally. Quote Link to comment Share on other sites More sharing options...
Rybags Posted November 27, 2020 Share Posted November 27, 2020 (edited) My initial post wrong - the Atari OS does in fact have BRK as the last checked for IRQ type. If the status copy on the stack doesn't indicate an instructional push, then it just returns from the IRQ handler (something that should never happen on stock hardware) Edited November 27, 2020 by Rybags Quote Link to comment Share on other sites More sharing options...
drpeter Posted November 30, 2020 Share Posted November 30, 2020 On 11/27/2020 at 5:21 AM, RevEng said: Yup, It's used internally. In the article referenced, the use of bit 4 as a pseudo-register bit to indicate an interrupt when the P register is pushed to the stack is explained, but bit 5, being pushed as '1' under all circumstances, still appears redundant.... Quote Link to comment Share on other sites More sharing options...
Rybags Posted November 30, 2020 Share Posted November 30, 2020 It's never used on 8-bit 6502s but the bit pair is used in native mode on the 65816. Quote Link to comment Share on other sites More sharing options...
zbyti Posted January 14, 2021 Share Posted January 14, 2021 I found this very interesting 1 Quote Link to comment Share on other sites More sharing options...
TGB1718 Posted January 14, 2021 Share Posted January 14, 2021 1 hour ago, zbyti said: I found this very interesting Yes, I was surprised I watched it till the end ? Quote Link to comment Share on other sites More sharing options...
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