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Trying to fix Colecovision PAL rev. D


hyuma

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You only seem to be getting 1.5V on that pin.  That's not in any spec.  Could you measure U1 pin 11 (the power pin) for comparison, using the same settings?
I get around 5.1v there

Inviato dal mio CLT-L09 utilizzando Tapatalk

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1 minute ago, hyuma said:

In the video is not clear but volt.per division is about 2v, so It is not 1.5v but around 5v

Inviato dal mio CLT-L09 utilizzando Tapatalk
 

Oh, I see.  So it is never talking to the VDP then.  (Or other I/O devices).  Try the same test on pin 19 now.  Let's see if it's attempting memory access.

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So, plenty of attempted memory access.
 
Let's see a logic analyzer output of U5 pins 1-6 and 15, just following a reset.  Remember to set the LA for TTL levels.
Ok, for now I made a video with scope on all U5 pins. Next post I will make video with Logic Analyzer...

http://imgur.com/a/bEXt6wm


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1 hour ago, hyuma said:

And this is logic analyzer results on U5:

 

http://imgur.com/a/jUefMaN

Which pin is each channel connected to?  The object is to make sure we see the proper inputs, and the proper output for those inputs.  So I am only concerned with pins 1-6 and 15, and it's important to know which channel each of them is connected to.

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8 minutes ago, ChildOfCv said:

Which pin is each channel connected to?  The object is to make sure we see the proper inputs, and the proper output for those inputs.  So I am only concerned with pins 1-6 and 15, and it's important to know which channel each of them is connected to.

From 1 to 6 by counting from top:

 

Channel 0 --> pin 1

Channel 1---> pin 2

Channel 2 ---> pin 3

Channel 3 ---> pin 4

channel 4 ---> pin 5

channel 5 ---> pin 6

channel 6 ---> pin 15

 

 

Edited by hyuma
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Just now, hyuma said:

From 1 to 6 by counting from top. Channel 0 is pin 1, channel 2 is pin 2... .etc..

Does that mean I can't see the output of pin 15 in the video then?  Rather than attempting to record video of the sampling, you could export the data to a CSV file and upload that (might want to zip it first).  Only a few seconds worth of samples would be needed, just hold reset until you start sampling.

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37 minutes ago, ChildOfCv said:

Does that mean I can't see the output of pin 15 in the video then?  Rather than attempting to record video of the sampling, you could export the data to a CSV file and upload that (might want to zip it first).  Only a few seconds worth of samples would be needed, just hold reset until you start sampling.

Ok, done, here is the link:

 

https://ufile.io/en111f96

 

edit, I updated the link because i made a mistake!

Edited by hyuma
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Did you hold the reset button before you started the sampling?

 

While the U5 chip itself seems to be functioning properly, at least for pin 15, the addresses are flipping between 0000 and E000.  This is definitely not normal behavior.  The first instructions are:

 

LD SP,xxxx

JP xxxx

LD HL,[8000]

 

That's at least 8 reads in a row from the 0000 range, followed by one from the 8000 range.

 

LD A,L

CP 55

JP NZ,xxxx

CALL xxxx

 

This should be about 8 more reads from the 0000 range, followed by 2 writes to SRAM in the 6xxx range, followed by more reads from the 0000 range.

 

Basically, the address lines should usually be in the 0000 range since that's where the BIOS is.

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44 minutes ago, ChildOfCv said:

Did you hold the reset button before you started the sampling?

 

While the U5 chip itself seems to be functioning properly, at least for pin 15, the addresses are flipping between 0000 and E000.  This is definitely not normal behavior.  The first instructions are:

 

LD SP,xxxx

JP xxxx

LD HL,[8000]

 

That's at least 8 reads in a row from the 0000 range, followed by one from the 8000 range.

 

LD A,L

CP 55

JP NZ,xxxx

CALL xxxx

 

This should be about 8 more reads from the 0000 range, followed by 2 writes to SRAM in the 6xxx range, followed by more reads from the 0000 range.

 

Basically, the address lines should usually be in the 0000 range since that's where the BIOS is.

yes keep pushed reset then sampling.. but just for sure i made another sampling:

 

https://ufile.io/zg96x3b5

 

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30 minutes ago, ChildOfCv said:

The 3rd sample looks like you were holding reset the whole time.

 

I'm looking for a sample set that I know begins within the start of sampling.  So what I mean is:  Hold down reset.  Start the sample.  Release reset.  Let it run for a second or two.  Stop.

 

Yes I've done like that but i think no changing... I made 3 other sampling tests, but i think is the same:

 

https://ufile.io/e66fd900

 

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I think I found some actual communication, but it quickly went wrong.

 

Maybe get a recording of the data lines.  What I'm thinking of is:

 

Place probes on D0-D7 (one place to grab these is U1 pins 14, 15, 12, 8, 7, 9, 10, 13).  Place one probe on U5 pin 15.  Place another probe on pin 26 of U1.  Begin recording, then tap reset a few times.  Then post that recording.  Let's see what data the processor sees from the BIOS.

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ok @ChildOfCv

 

Here the sampling:

 

channel 0 = pin 14 

channel 1 = pin 15

channel 2 = pin 12

channel 3 = pin 8 

channel 4 = pin 7

channel 5 = pin 9 

channel 6 = pin 10

channel 7 = pin 13

channel 8 = pin 15 (U5) 

channel 9 = pin 26 (U1)

 

https://ufile.io/u72hem52

 

I have used 5V TTL. I noticed on logic anaylzer software that reset line change state from hi to lo when i press reset.. but watching the csv files, seems like the line is always hi, there is always "1"...

Edited by hyuma
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Yeah, and also this one is only half a second worth of samples, with 1937 samples total.  The sample time must have been set low or something.
I have to change some settings on the logic analyzer and try to resample?

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It seems to be a reset problem.  There is a regular pattern of resets, even though it has read the correct values up to the reset point.  The pattern itself is pretty strange.  Always 4 instructions, reset, 2 instructions, then reset for around 300ms, then repeat the cycle.  The values read from BIOS are correct up to the reset point, at least.

 

Here are the time steps:

 

0.0946862 49

0.0946876 185

0.0946884 115

0.0946893 195

*reset*

0.0946906 49

0.0946915 185

*reset for 300ms*

0.1257552 49

0.1257566 185

0.1257575 115

0.1257583 195

*reset*

0.1257597 49

0.1257605 185

*reset for 300ms*

0.1568243 49

0.1568257 185

0.1568265 115

0.1568274 195

*reset*

0.1568288 49

0.1568296 185

*reset for 300ms*

0.1878933 49

0.1878947 185

0.1878956 115

0.1878964 195

*reset*

0.1878978 49

0.1878986 185

*reset for 300ms*

0.2189624 49

0.2189638 185

0.2189646 115

0.2189655 195

*reset*

...

 

Those resets do not seem to be coming from the reset pin, at least the logic analyzer doesn't think so.

 

Might be an interesting experiment to see if your first Z80 chip acts the same way.  But even if not, this is not normal behavior, and I wonder if the replacement is less than good too.  Could be the typical Chinese thing of changing the label to make the chip look better than it is--perhaps the chip can't actually cope with the 3.58MHz clock because it's really the 2MHz version.

 

Edited by ChildOfCv
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