ijor Posted March 1, 2021 Share Posted March 1, 2021 Hyper fast SIO loader at 600 Kbps ... SioSync-Test1.mp4 Using synchronous mode, of course. Technical details, docs and link to source code, shortly in a separate thread. 13 3 Quote Link to comment Share on other sites More sharing options...
foft Posted March 1, 2021 Share Posted March 1, 2021 Wow, when I discussed with Hias I heard there wasn't much scope for faster from a software perspective. Quote Link to comment Share on other sites More sharing options...
TGB1718 Posted March 1, 2021 Share Posted March 1, 2021 Don't keep us waiting too long Quote Link to comment Share on other sites More sharing options...
foft Posted March 1, 2021 Share Posted March 1, 2021 I should add its March 1st today not April 1st 1 1 Quote Link to comment Share on other sites More sharing options...
Faicuai Posted March 1, 2021 Share Posted March 1, 2021 (edited) 1 hour ago, ijor said: Hyper fast SIO loader at 600 Kbps ... SioSync-Test1.mp4 241.4 kB · 2 downloads Using synchronous mode, of course. Technical details, docs and link to source code, shortly in a separate thread. Well, that's fixed-storage (HD) speed territory! ...At least for linear, "burst"-type of operations, like loading a file straight, which is VERY different than, say, moving a SDX directory (with +100 files) to somewhere else (a much more transactional operation, in nature, but typical in a productive environment). What HW modifications are required to achieve this (pretty high) level of performance through SIO? If no HW modifications / surgery required, then that is another show of the A8 brute-force, when DMA is not possible or practical ! Edited March 1, 2021 by Faicuai Quote Link to comment Share on other sites More sharing options...
_The Doctor__ Posted March 1, 2021 Share Posted March 1, 2021 (edited) standard SIO port is in the description, we discussed external clock with a chip to keep the data happy based on some work and provided either links or mentions to the work at some point. I wonder if this will turn out to be the same sort of affair... the chip was to keep a clock overlap from corrupting data in the earlier discussions. Extremely nice to see some activity here. I am very excited and interested in what the solution is. You are showing 48KiloBytes a second give or take in the video. No errors. D*mn fine work. Edited March 1, 2021 by _The Doctor__ Quote Link to comment Share on other sites More sharing options...
xxl Posted March 1, 2021 Share Posted March 1, 2021 2 hours ago, ijor said: Using synchronous mode, of course. excuse me for a moment, just wet my pants 2 Quote Link to comment Share on other sites More sharing options...
+Nezgar Posted March 1, 2021 Share Posted March 1, 2021 SIO competing with PBI speeds, whodathunk! Quote Link to comment Share on other sites More sharing options...
flashjazzcat Posted March 1, 2021 Share Posted March 1, 2021 (edited) This is extremely interesting. If the source isn't too big, I could attempt to implement a driver in the U1MB/Incognito PBI BIOS. Edited March 1, 2021 by flashjazzcat 4 Quote Link to comment Share on other sites More sharing options...
ijor Posted March 1, 2021 Author Share Posted March 1, 2021 This is not a trick or an April 1st joke. It is very real. The video is a live capture of a real Atari 8-bit computer without any hardware modification whatsoever. The numbers displayed were computed on real time when processing the transfer. 3 Quote Link to comment Share on other sites More sharing options...
ijor Posted March 1, 2021 Author Share Posted March 1, 2021 1 hour ago, flashjazzcat said: This is extremely interesting. If the source isn't too big, I could attempt to implement a driver in the U1MB/Incognito PBI BIOS. I assume this would be for 800 mode, because otherwise you could use the PBI, or I miss something? I'm not really familiar with the Incognito hardware. Does it have any kind of MCU or FPGA? Or it is just a CPLD and the firmware runs on the Atari CPU? There are here two sides, as in a typical SIO2XX implementation. The Atari needs a special loader, but it is rather small and I don't see a problem with that. However you need something on the other side to generate the synchronous serial transfer, and it has to be something much faster than Sally or a bare 6502. I used an STM32 MCU. Don't know, in your case you have access to the system (PHI2) clock I guess, right? This should make things much easier to process transfer fully synchronously. Quote Link to comment Share on other sites More sharing options...
_The Doctor__ Posted March 1, 2021 Share Posted March 1, 2021 (edited) 13 minutes ago, ijor said: This is not a trick or an April 1st joke. It is very real. The video is a live capture of a real Atari 8-bit computer without any hardware modification whatsoever. The numbers displayed were computed on real time when processing the transfer. the loader is exactly what he means, the device outside the Atari is just that... whoever makes devices utilizing it would then be supported without possibly having to load the loader... it could be in rom or patched in using pbi etc.. Edited March 1, 2021 by _The Doctor__ Quote Link to comment Share on other sites More sharing options...
_The Doctor__ Posted March 1, 2021 Share Posted March 1, 2021 (edited) I could also see a cartridge containing the loader and serving the ATR (AVG style) depending on where and how the loader needs to live Edited March 1, 2021 by _The Doctor__ Quote Link to comment Share on other sites More sharing options...
xxl Posted March 1, 2021 Share Posted March 1, 2021 (edited) ok i took the pills i'm ready to see the loader. --- the SIO protocol is preserved? data added to the checksum when completing data in SERIN? Edited March 1, 2021 by xxl Quote Link to comment Share on other sites More sharing options...
flashjazzcat Posted March 1, 2021 Share Posted March 1, 2021 23 minutes ago, ijor said: I assume this would be for 800 mode, because otherwise you could use the PBI, or I miss something? No: this would be in XL/XE mode using the inbuilt PBI math pack overlay ROM. It already has an implementation of Hias' HSIO driver with SIO2BT support added. So, the need for OS patching is totally done away with. 25 minutes ago, ijor said: I'm not really familiar with the Incognito hardware. Does it have any kind of MCU or FPGA? Or it is just a CPLD and the firmware runs on the Atari CPU? CPLD for logic, but everything procedural is done on the 6502. 26 minutes ago, ijor said: There are here two sides, as in a typical SIO2XX implementation. The Atari needs a special loader, but it is rather small and I don't see a problem with that. However you need something on the other side to generate the synchronous serial transfer, and it has to be something much faster than Sally or a bare 6502. I used an STM32 MCU. Don't know, in your case you have access to the system (PHI2) clock I guess, right? This should make things much easier to process transfer fully synchronously. I still have a Nucleo development board here (borrowed), which I guess would work. Looking forward to the full details! Quote Link to comment Share on other sites More sharing options...
ijor Posted March 2, 2021 Author Share Posted March 2, 2021 44 minutes ago, xxl said: the SIO protocol is preserved? data added to the checksum when completing data in SERIN? Not all the SIO protocol is preserved. I'm not using A/C/E because they are a waste in this context, although this could be added, if wanted. But yes, the SIO checksum is fully supported and it is computed on the fly while receiving the packet. Which, believe me, it's not an easy thing to do at this speed. I'll elaborate and post full sources in the other thread. 3 Quote Link to comment Share on other sites More sharing options...
ijor Posted March 2, 2021 Author Share Posted March 2, 2021 (edited) 1 hour ago, flashjazzcat said: No: this would be in XL/XE mode using the inbuilt PBI math pack overlay ROM. It already has an implementation of Hias' HSIO driver with SIO2BT support added. So, the need for OS patching is totally done away with. .... CPLD for logic, but everything procedural is done on the 6502. Ah, ok, I understand. Yes, that would probably be doable. 1 hour ago, flashjazzcat said: I still have a Nucleo development board here (borrowed), which I guess would work. Looking forward to the full details! Good, but not every Nucleo is good enough. At least not if you want to support all the features. And by that I mean clock aligning (no errors) at the maximum frequency (~597 KHz). I'm using a board like this that usually costs even less than a Nucleo: https://www.ebay.com/itm/Core407V-STM32F407VET6-STM32-Cortex-M4-Development-Board-Motherboard-Module-Kit/182289028741 Edited March 2, 2021 by ijor Quote Link to comment Share on other sites More sharing options...
Rybags Posted March 2, 2021 Share Posted March 2, 2021 Couldn't the checksum just be computed at end of frame? Or are we talking IO operations of large chunks where it'd create a big overhead between blocks? Quote Link to comment Share on other sites More sharing options...
ijor Posted March 2, 2021 Author Share Posted March 2, 2021 5 hours ago, Rybags said: Couldn't the checksum just be computed at end of frame? Yes, of course. But that would take extra time. Quote Link to comment Share on other sites More sharing options...
E474 Posted March 2, 2021 Share Posted March 2, 2021 (edited) Hi ijor, This is very impressive! I have the same STM32 board (I started on UnoCart hacking literally this weekend), do you need any extra components, or are you connecting the pins on the STM32 board directly to an SIO connector? Edited March 2, 2021 by E474 Quote Link to comment Share on other sites More sharing options...
ijor Posted March 3, 2021 Author Share Posted March 3, 2021 7 hours ago, E474 said: This is very impressive! I have the same STM32 board (I started on UnoCart hacking literally this weekend), do you need any extra components, or are you connecting the pins on the STM32 board directly to an SIO connector? Hi E474, Great board! Isn't it? Insane powerful for that price! I'm not using any other components at all and I do am connecting the pins directly to the SIO connector. In theory some kind of buffering might be recommended because these chips aren't really 5V tolerant. They are 5V tolerant only as long as it is powered. That means that the chip might be damaged if you power up the Atari but not the board. In this case, actually, the signals are not directly connected to 5V at the Atari, but only through rather weak pullup resistors. So the risk might be low. Also the buffering gets a bit complicated because at least the output clock must be tristated. If you also consider that the board is so cheap that it is not big deal if you need to replace, then the whole idea of using buffering, might be even silly Btw, I accidentally erased the original flash. Not big deal but I would like to get it back, if possible. Do you still have the original factory flash that power up as a SD card reader? If so, exactly which version of the board you have? Quote Link to comment Share on other sites More sharing options...
E474 Posted March 3, 2021 Share Posted March 3, 2021 Hi ijor, Looking back through my emails, it's this one: https://www.aliexpress.com/item/33013274704.html - but it has been sitting in a static bag until last weekend, so I have only now had any free time to do anything with it. If you want to send me info on how to dump the factory firmware I can have a go, but I am a newbie with this board (I have set up Attollic studio on Linux, and built/uploaded a new firmware to the UnoCart, but it is really early days for my STM32 hacking). I agree it's not such an expensive board, but when I ordered it I also got a screen with it, but that pushed it over £15 in total, so it got hit with UK import fees and handling charges from the Post Office. If I had ordered as 2 separate shipments/packages both would have been under £15, and would have sailed through customs, for half the eventual price. I don't know enough about hardware to figure out how to prevent the problems you've described, hopefully someone like @mozzwald or @Mr Robot will flesh it out into a simple circuit. I will be a bit cautious though, as I'm not a big fan of magic blue smoke. So far I haven't had time to really see what this board can do, I was reading up on DMA2D, but have just found out that's only present in the F429 and higher, not the F407! Still, I have a working tool-chain for coding now, it's just finding the time to sit down and get up to speed on it. Very nice work on the Hyper Speed SIO Loader - happy to help out especially given we have what look like identical STM boards! Quote Link to comment Share on other sites More sharing options...
flashjazzcat Posted March 3, 2021 Share Posted March 3, 2021 On 3/2/2021 at 12:30 AM, ijor said: Good, but not every Nucleo is good enough. At least not if you want to support all the features. It's an H743ZI with a maximum frequency of 400MHz. Electrotrains lent it to me for UNO cart hacking purposes. Do you think it's good enough for this application? 1 Quote Link to comment Share on other sites More sharing options...
tschak909 Posted March 3, 2021 Share Posted March 3, 2021 I hope we can fold this into FujiNet, could definitely use some help. -Thom 2 Quote Link to comment Share on other sites More sharing options...
ijor Posted March 8, 2021 Author Share Posted March 8, 2021 On 3/3/2021 at 10:38 AM, flashjazzcat said: It's an H743ZI with a maximum frequency of 400MHz. Electrotrains lent it to me for UNO cart hacking purposes. Do you think it's good enough for this application? Wow, that's a nice Nucleo! Yep, I think it is good enough. LOL. 1 Quote Link to comment Share on other sites More sharing options...
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