TIPI/1024K SAMS combo development

[J-Data]

Toying with the idea of making a Combo TIPI/1024K card based on the TIPI/32K, using the CPLD to emulate the SN74LS612 mapper.  Need to do it in baby steps.  

 

First step is to kludge a 512K SRAM (AS6C4008) on the TIPI/32k.  This is the largest x8 SRAM I can find in the traditional DIP package and should be fine to prove the concept and to develop the CPLD on.  The 32K memory space works fine on this as expected.

 

 

 

Only mod will be connecting A12-A18 from the CPLD to the SRAM.  All the TI data, address and control lines needed for SAMS functionality already go to the TIPI's CPLD.  I'll need to temporarily remove TIPI functions from the CPLD to fit the SN74LS612 mapper.  Doubtful both functions can fit, so next size up (XC95288XL - 144 TQFP) and 4 layer PCB are probably needed in a final version  Would likely go to a surface mount SRAM and EPROM to save space as well.  We'll see how far I can take this and If I can get it to fit the current board outline. 

 

Did I hear someone had already developed a programmable logic emulation of the LS612?  That would be a big time saver if source code was available. 

 

Let me know your thoughts. 

 

[RickyDean]

You may find something useful here, http://www.baltissen.org/newhtm/mmu.htm

[J-Data]

Small update.  The schematics are the easy part.  Need to fit the eight 7-bit memory map registers in the CPLD.  I'm starting with a single register to test the concept.