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Shift838

838 - IO Card (Flex Interface card replacement!)

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Posted (edited)

Introducing the 838 IO Interface Card

 

 

I think it's time to share one of the projects that has been long coming and I can see the light at the end of the tunnel.

 

I have been tossing around the idea for about 5 or 6 years to do this as I have seen many post about how much TI'ers hate the firehose cable on the Flex Interface.  I attempted it once (hand wired) some years ago and ran into a few issues and put it up for a while.  A few months ago I decided to make another go at it.  

 

For a prototype I hand wired a side port  withi a dual sided proto board and a PEB card using one of @KsarulPEB prototype boards.

 

I chatted via email with a few TI'ers like @InsaneMultitasker @Ksarul and @fabrice montupet for some ideas and explanations on things.  Thanks guys!

 

The concept I wanted to do was to create a smaller footprint of the side port mainly with a less bulky cable and instead use a standard 40 pin IDC ribbon cable (not an IDE cable).  I also wanted to go ahead and perform the upgrades for the so called Flex Cable Tune Up to allow for faster data transfer using the 74HCT244's if a TI'er decided to upgrade the 32k on the 16bit bus inside the console or a faster crystal.  So the below was born.

 

I decided to create the side port as a vertical standing board to reduce the real-estate.  Keep reading, there is a theoretical surprise at the end (if it works) for the die hard TI'ers!

 

Here are photos of the hand wired prototype boards for both PEB and side port:

 

proto-bottom.thumb.jpg.4d68648e46aa82d23398525140ec7a3b.jpgproto-top.thumb.jpg.74af4db7a0679f427c3482dd7e31d544.jpg

 

quite a few wires as you can see.  But it worked the first time!

 

Once I had the prototype working i started designing the boards in Eagle.  I did get a footprint wrong (voltage regulator on the side port) and accidentally swapped the input with output.  I figured that out before I ever populated the board as I sit there and verified traces.  I had to sever 2 traces as you see in the below pics and jump them to their right spots.

 

I soldered a PEB and a Side Port card up. and it worked!

 

Check out the photos below. 

 

The new IO interface is hooked up to my bench test unit which is just a 99/4A motherboard, F18A and TI99-USB Keys version 2.0.  Powered by a Mean Well PT-65A.

 

There is one issue I have to chase but it does not affect the functionality of the card.  I followed the Flex card schematics by the way that were published years ago and tried to keep most of the same pin wirings if I could between the PEB BUS and 99/4A BUS.  I also named all the components the same as the original Flex Interface for easier identification and tracing.. 

 

I added a power LED to the side port card after speaking with @fabrice montupetto show the side port was getting power from the PEB card and we all like LEDs (LOL)..  

 

The issue I have found is that if the PEB is not powered up and when the 99/4A is powered up the LED on the PEB card lights up.  It's odd as there is no VCC lines passing to the side port card from the 99/4A console.  But of course the LEDs work as expected when both the PEB and console are powered up.  As I said it does not affect the functionality of the card.  Once I figure that out then it will be perfect and after some more testing be ready for the wild.  If anyone has any ideas on the issue please comment and I can check it out.  

 

The card for the side port will have a 3D case designed for it.

 

First run of prototypes:

 

838-TIO-1.thumb.jpg.1402d4fe3ee0f4da9ebee9b290729fc2.jpg

 

838-TIO-SPC-TOP.thumb.jpg.6d8eb0328b169e1a40b69c2294fb6ad5.jpg

 

838-TIO-SPC-BOTTOM.thumb.jpg.ab681392103d621c1ae6c2d05a3c584e.jpg

 

838-TIO-2.thumb.jpg.7a19a693e3bc7ba734fbf95282635d30.jpg

 

Installed on my 838 PEB board!

838-TIO-INPEB.thumb.jpg.03c731c49148f467f31750b51efc0aec.jpg

 

Memory check comes back!

838-TIO-RUNNING.thumb.jpg.756e467353f4b9a58f082efbbc87863a.jpg

 

now for the surprise!  Talking with @InsaneMultitasker he made a comment that he never had enough PEB slots.  so i originally thought of trying to expand on the 838 PEB board with a connector to additional slots, but talking with @Ksarul enlightened me that was not possible and I would need to use 2 flex interface cards.  So that got me thinking,  how about a dual side port card that allows for 2 connections for 838 IO Interface PEB boards!  Ran that idea by him and he agreed that in deed should work.

 

I designed a dual board for the side port in eagle and sent it off to be fabricated along with the others.  I know the dual port has the same issue as far as the voltage regulator mentioned above since I used the same footprint.  I don't want to put one together until I figure out the issue with the LED for now.  but i plan on assembling one soon along with a second 838 PEB board and give it a shot.  

 

If all goes well them @InsaneMultitasker and other TI'ers will have an option of a total of 14 PEB slots on the TI..  Please don't tell me someone needs more than that!

 

IMG-2709.thumb.jpg.1af522650bb4e9a24ccc8cfc7998b889.jpgIMG-2710.thumb.jpg.777c9a39776eb42c904a6bc7f1afcf56.jpg

 

the dual port version is the same size and hole placement as the single port version and will fit into the same 3D case that will be designed.

 

Let me know what your thoughts are.

 

Edited by Shift838
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how tall relative to the case does the side card extend? Looking at your test MB it looks to be the same height as the top of the cartridge, does that mean it's roughly flush with the top of the case? Getting rid of that firehose is a long standing dream for most TI users.

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Time to save up some money, two 838 PEB boards and a turbo interface is on the must have list! 😅👍

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Finally a solution to that pesky fire hose problem! Thank you!

Regarding the dual connector board, I assume this means a second PEB will be needed for extra slots. That's a lot of real estate there... Not sure how many out there other than Insane Multitasker really need dual PEB's, particularly with the TIPI obviating the need for ramdisks and for some even RS232 and disk controller cards... That said, if the price difference between the single and double connector boards is minimal, perhaps you might just offer the dual connector one to keep all options open. Who knows what hardware might come up in the future :)

In any case, please sign me up!

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Chris,


Interesting project, but for me with minimal use on the 4A, not something I would personally need.  Myself, I would have been interested in a primary PEBox to secondary PEBox card so the Geneve could have more access to additional cards with the second PEBox.  I don't know (doubtful probably), the Geneve could interface and use the cards in another PEBox, but I will throw it out there as an idea.

 

There are probably only a single handful of users, if that many, that would be interested in such a setup.

 

Beery

 

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7 hours ago, LASooner said:

how tall relative to the case does the side card extend? Looking at your test MB it looks to be the same height as the top of the cartridge, does that mean it's roughly flush with the top of the case? Getting rid of that firehose is a long standing dream for most TI users.

i tried to keep it as close as I could to get it in a 3D case and be close to the same height has a 99/4A inside its case.

 

 

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3 hours ago, Vorticon said:

Not sure how many out there other than Insane Multitasker really need dual PEB's, particularly with the TIPI obviating the need for ramdisks and for some even RS232 and disk controller cards...

Yea, I've never 'needed' dual PEBs though my primary development system is currently full.  As for one card obviating another, I think that depends on how each person is using their system.  I develop on real hardware, where both the TIPI and Ramdisk are indisposable, and the RS232 comes in handy for debugging. 

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12 minutes ago, humeur said:

A question Does hct circuit use really save time ?

 

jl

it will speed up the data getting in and out of the 99/4A bus if you have upgraded to 32k ram on a 16 bit bus or increased the crystal speed but it's not going to double the speed or anything just make it a bit faster in and out of the bus.  But you have to take advantage of one of the other console upgrades mentioned above to do it.

 

The main reason for developing this card was to get rid of the bulky firehose cable.

 

 

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This is a definite nice idea, especially since it also includes replacements for the TI Flex Cable Interface board. Too many of those cards were mangled/destroyed over the years. I think I actually have four PEBs I've picked up over the years that didn't have one in them--very useful for a Geneve or SNUG system, but otherwise a problem. I have one used in each of those configurations (and I also use one for a 99/8 PEB, since they use an Armadillo Interface card instead), and will definitely need one of these new cards to bring the fourth box back to life.

 

The PEB Splitter board provides similar functionality to the dual-port version, but it also requires the user to have two functional Flex Cable Interfaces for the pair of PEBs hosting the backplanes.

 

As to @Vorticon's question, yes, you would need two PEBs to get full functionality as things stand today. Of course, it would also be possible to design a dual backplane setup and put it into one of the larger tower PC cases or one of the old Compaq Server cases--then you could have an all-in-one system.

 

 

Now I'll definitely need to snag a few of these. . .  :)  :)  :)

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1 hour ago, Shift838 said:

it will speed up the data getting in and out of the 99/4A bus if you have upgraded to 32k ram on a 16 bit bus or increased the crystal speed but it's not going to double the speed or anything just make it a bit faster in and out of the bus.  But you have to take advantage of one of the other console upgrades mentioned above to do it.

 

The main reason for developing this card was to get rid of the bulky firehose cable.

 

 

Why would it speed up anything visible to the CPU ? It may change the timing a bit, but it won't change the period/cycle counts. The 16 bit - in console - ram upgrade will make ram access faster, sure, but it has zero to do with things attached to this device. The crystal update impacts performance of things driving the 8 bit bus. But history documents that the LS chips have handled that anyway.  I think we have myths... 

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On 8/13/2021 at 11:35 AM, humeur said:

A question Does hct circuit use really save time ?

 

jl

 

On 8/13/2021 at 11:50 AM, Shift838 said:

it will speed up the data getting in and out of the 99/4A bus if you have upgraded to 32k ram on a 16 bit bus or increased the crystal speed but it's not going to double the speed or anything just make it a bit faster in and out of the bus.  But you have to take advantage of one of the other console upgrades mentioned above to do it.

 

The main reason for developing this card was to get rid of the bulky firehose cable.

 

 

 

Uhm, 74HCT is slower than 74LS.  The main savings you get by using HCT is lower power and *almost* as fast for propagation delay.

 

If you look at the datasheets, from the same manufacturer, TI in this case, for the 74LS244 and 74HCT244:

 

74LS244: 12ns to 18ns @ 27mA to 46mA

74HCT244: 15ns to 28ns @ ~3.0mA

 

So, huge power savings, but slower.  The "S" in "LS" means speed.  There is no "S" in "HCT".  See my post below.  The "S" is actually for a Schottky diode (named after the engineer) used to make LS faster.  The "H" in "HCT" is for "high speed", but it is referring to CMOS, which was slower than TTL, so it is all relative.  Best to always check the datasheets.

 

Also, the idea of "speed" is the wrong mental model for what is happening.  Chips all operate at the same "speed", i.e. electron flow which is roughly equivalent to the speed of light. 

I need to make a correction, since it was pointed out that it is not actually "electron flow", but rather other atomic interactions going on that do not need to be discussed here to convey the idea I was trying to explain.  Just to be clear then, everything I'm saying here is a simplification, without going into atomic and sub-atomic theory.

 

What each device introduces is a *delay* as signal passes through the device from an input to an output.  This is call "propagation delay", and is basically the time from when an input to a devices changes, to how long it takes to see that change on the output of the device.

 

   |___|__
___/   |  \_______ Input
   |   |_____
___|__/|     \____ Output
   |   |
-->|   |<-- Propagation Delay, usually in nanoseconds

The CPU has a "cycle time", i.e. the amount of time devices on the bus have to respond to a memory or I/O request.  The 9900 cycle time is roughly 333ns total, so anything providing data to the CPU has to be able to respond in less time than that.

 

There are also a number of buffers between the CPU and a memory device, and each adds a delay, and the device itself will have some amount of time it needs to gather the data and put it on the bus, then the data has to get back to the CPU.  Add up the delays, and if they are less than the amount of time the CPU will wait for an answer, then things tend to work.  This is a gross simplification, but that is the gist of it.

 

Memories in the era of the 99/4A tended to need 200ns or more to respond.  ROMs tend to be slower, Static RAM tends to be faster.  DRAM at that time was somewhere in the middle too, with 120ns to 180ns being considered fast.

 

These days, normal Static RAM, as well as most ROMs, have a response time of 70ns to 80ns typical, with high-speed stuff being in the 10ns to 20ns range, and the really expensive stuff going down to 1ns or even picoseconds (CPU cache kind of stuff).

 

So, updating a memory card in the PEB with a faster response device should be fine, it should not break anything and has nothing to do with the buffers in between the memory card and the CPU.  If anything it would make the system more reliable since the RAM can respond in less time.

 

You do have to be careful about just swapping the chips in an existing circuit, and always read the datasheets.  The designers did know what they were doing, despite the crappy design decisions in the 99/4A. :P

 

Edited by matthew180
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:lol:

2 hours ago, matthew180 said:

The "S" in "LS" means speed.  There is no "S" in "HCT".

Dave Winlow, former Mgr, I&C Engineering, GE Canada Nuclear Products


Low Power Schottky is a transistor-transistor logic (LSTTL) gate technology that is probably 30 to 40 years old now. It uses Schottky junction transistors in the switching elements of the logic gates that provide, not just low power, but also high speed. Low power because the Schottky junction does not produce the large density of minority carriers that a standard pn junction transistor produces and therefore it takes only a tiny fraction of the switching time that a pn junction transistor requires (to sweep all of those extra minority carriers out of the depletion region). And because the switching times are much smaller, less power is dissipated since, in most switching circuits, most of the power is dissipated during the switching period. Thus, Low-power Schottky Transistor Transistor Logic - LSTTL. This technology has long since been essentially superseded by CMOS logic, now found in most very high density logic elements such as processors, co-processors and peripheral controllers.

 

What-is-Low-Power-Schottky?

 

Edited by HOME AUTOMATION
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Wunderbar - keyed connectors, says the master of plugging in cables wrong.

I always though the pbox interface cable would be a great place for a clock chip.

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@HOME AUTOMATION

Yeah, I was thinking about that and figured I better check:

 

  • 74S – Schottky (high-speed). Implemented with Schottky diode clamps at the inputs to prevent charge storage, this provides faster operation than the 74 and 74H series, traded off for greater power consumption than the original 74 family and higher cost. 3 ns gate delay, 20 mW dissipation, released in 1971.
  • 74LS – Low-power Schottky. Implemented using the same technology as 74S but with reduced power consumption and switching speed, due to larger resistors. Typical 10 ns gate delay, remarkable (for the time) 2 mW dissipation, 4.75–5.25 V.

So the "S" is for "Schottky", but was used to increase the speed.  I'll make an edit.  Also, the "H" in "HCT" is for "high speed", but is it CMOS vs TTL, so the speed is relative to CMOS.  Still, best to check the datasheets.

Edited by matthew180
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49 minutes ago, HOME AUTOMATION said:

Dave Winlow, former Mgr, I&C Engineering, GE Canada Nuclear Products

So it's Canada's fault

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41 minutes ago, GDMike said:

So it's Canada's fault

Always.  No exceptions.

 

Trump&#39;s latest trade tactic: Blame Canada

 

 

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3 minutes ago, InfiniteTape said:

Any characterization on the length of the ribbon?

so far I have tested it with a 4 foot cable with no issues.  planning on testing a 6 foot next few days, but that is as long as I will test.

 

I have tested with this one:

 

Amazon.com: Antrader 10Ft/3M IDC 40Pin 1.27mm Rainbow Color Flat Ribbon Wire Cable for 2.54mm Connectors: Computers & Accessories

 

 

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1 hour ago, GDMike said:

So it's Canada's fault

 

Up 'till now... I'd always thought it was Einstein's fault...🐤

 

Einstein, was wrong.

 

Chickens do fly!

 

can-chickens-fly_4031b26d-5823-4e05-9c42-5833bc842f79.thumb.jpg.2db24a4d7b3bb67eaa14ac2f6ed2a5a2.jpg

;-)

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6 hours ago, InsaneMultitasker said:

Yea, I've never 'needed' dual PEBs though my primary development system is currently full.  As for one card obviating another, I think that depends on how each person is using their system.  I develop on real hardware, where both the TIPI and Ramdisk are indisposable, and the RS232 comes in handy for debugging. 

Agree. I actually keep 2 RS232's in my system alongside the TIPI, one for parallel port interfacing and comms, and the other for printing to a dot-matrix printer and HDX connectivity. I did however get rid of my ramdisk as it seemed redundant. I assume you keep yours because it's faster in access than the TIPI?

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