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Any way to accurately simulate the A8 with the 6502 running at 2x speed of the rest of the system?


Xebec

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Hi folks!

 

I've always wondered how much faster/differently the Atari 8bit would run with a simple no-cache clock doubled 6502 on-board, with the rest of the system running at stock 1.77/1.79 MHz frequencies.

 

I know the bus is shared, and the CPU doesn't have full access to RAM which limits performance for faster CPUs.  But I also know some instructions take a really long time on the 6502, so I was wondering if there was an accurate way to emulate this to see and measure how it performs?

 

Is this something that can be done via Altirra,  or will Altirra double the speed of everything? 

 

Thanks!

John 

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Triggered by SYNC, you could index an EEPROM with bitpatterns that indicate whether the CPU need access to the bus for a read or a write the next maximum of 7 cycles. If it doesn't need it, but /HALT is asserted, you could run a CPU cycle without bus access. Won't work that easy with SALLY I guess, but with a plain 6502 and a buffer, this could work. Not sure how many extra cycles you can get this way.

 

And then there's the /REF /HALT combination. If you replace your RAM by SRAM, you could reclaim these cycles, by putting a buffer between ANTIC and the bus. If /REF and /HALT are both asserted, disconnect ANTIC from the bus and suppress the /HALT signal to the CPU. That's 9 cycles per scanline.

 

Edit: the last idea needs extra logic to not suppress the /HALT signal if the CPU does a write to ANTIC during that cycle, which will fail if ANTIC is disconnected from the bus.

Edited by ivop
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Not exactly a pressing enhancement but it would be nice to adjust the running speed of the 8bit in Altirra anywhere from 1x - 2 or 4x its normal speed.  There are a few games that would benefit from running at 125% or 150% or normal speed for better playability.  Currently you can do 1x or Warp speed with the F1 key :)

 

I didnt realize I could emulate the 65C816, might try that to see if it speeds up normal ops.

 

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Long time ago (like around 2007) there was a prototype 65C816 accelerator. It could be configured so that the memory was running at the stock clock and the CPU was accelerated to 10.64 MHz (stock clock x6) - so the only speed gain in that configuration was from the internal CPU operations being fast, whereas memory accesses were slow.

 

In that configuration the average speed gain was around 25%, i.e. just about the same as if you disabled the Antic DMA on a stock computer. I hope this anwers the question how much would one gain by just doubling the CPU clock.

Edited by drac030
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47 minutes ago, Goochman said:

Not exactly a pressing enhancement but it would be nice to adjust the running speed of the 8bit in Altirra anywhere from 1x - 2 or 4x its normal speed.  There are a few games that would benefit from running at 125% or 150% or normal speed for better playability.  Currently you can do 1x or Warp speed with the F1 key :)

 

You can already adjust 0 - 500% right here.

 

speedadjust.thumb.png.0733c46acae4e896ff65eb4efb864f7d.png

 

Edited by MrFish
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12 minutes ago, MrFish said:

 

You can already adjust 0 - 500% right here.

 

speedadjust.thumb.png.0733c46acae4e896ff65eb4efb864f7d.png

 

But that speeds up the whole computer, not just the CPU.

 

Also, I guess I missed the "simulate" part of the OP's title. My previous post is about real hardware :)

 

Edit: BTW always set that to Match hardware if you do any serious developing.

Edited by ivop
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46 minutes ago, ivop said:

Edit: BTW always set that to Match hardware if you do any serious developing.

 

Yeah, I'm doing no serious development right now. I use this setting to increase the video quality of certain flicker modes (when not using frame blending).

 

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Eclair allows you to turn on the 6502 clock higher, you can also set the mode in which the 6502 works with a higher frequency while Antic does not display so that there is no image distortion when this is cpu cycled.

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In theory the 3.58 speed should simulate it but you'd probably want to untick "Shadow ROM in fast RAM".

 

I also believe an Antic cycle steal, refresh or DMA should halt a 3.58 MHz CPU for 2 cycles a time, not just one.

 

Accelerated bus - yes, at a minimum you need Ram accesses at the CPU speed.  The annoying nature of 6502 is that every cycle does a memory access.  Our normal Roms - AFAIK accelerators using them will have wait states.

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26 minutes ago, Irgendwer said:

I don't think that this is true.

What about the single byte 2 cycle instructions (e.g. CLC, SEC, TAX, TXA) ?

What about the additional cycle when crossing a page boundary or performing a branch?

The problem is that it is difficult to tell when the 6502 is doing a dummy fetch and can be isolated from the bus. In the case of a page crossing, I don't think it even knows internally until it has already issued the read cycle, as the point of that is to optimize for non-crossing reads by speculatively issuing a possibly incorrect read. The 65C816, on the other hand, has an explicit signal indicating when it is doing an internal operation cycle.

 

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49 minutes ago, Irgendwer said:

I don't think that this is true.

What about the single byte 2 cycle instructions (e.g. CLC, SEC, TAX, TXA) ?

What about the additional cycle when crossing a page boundary or performing a branch?

These are all memory-access cycles. In 6502 you have only one RW line and it always indicates either read or write cycle.

Edited by drac030
typos
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If you run the 02 clock at either 7.16mhz (accessing fast SRAM) or 1.79mhz (accessing anything else), you get about a 300% increase in execution. At 14.32mhz, it is about 600%.

 

And, at 3.58mhz, it's a puny 150%. Not hardly worth the effort when you can do 7.16mhz so easily.

 

Bob

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12 hours ago, drac030 said:

On 6502 (unlike on e.g. 65C816) every CPU cycle = memory access cycle. So without accelerating the bus you would get nothing.

Please educate me here -- is this the case even when the 6502 is executing instructions that take several cycles to complete?  

 

Like if an instruction takes 6 clock cycles to execute, it needs the memory bus for all 6 of those cycles?  

 

And just to make sure I'm understanding, a 65C816 at double speed might be a better bet for a simple no-cache speedup?  

 

Thanks

Edited by Xebec
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