+Andrew Davie Posted December 6, 2021 Share Posted December 6, 2021 I'd really really like to see some CDFJ capability added. I'd be prepared to assist, where possible! 2 Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted December 6, 2021 Share Posted December 6, 2021 AFAIK the games would have to be recompiled to the PlusCart. 1 Link to comment Share on other sites More sharing options...
+Al_Nafuur Posted December 6, 2021 Share Posted December 6, 2021 1 hour ago, Andrew Davie said: I'd really really like to see some CDFJ capability added. me too 1 hour ago, Thomas Jentzsch said: AFAIK the games would have to be recompiled to the PlusCart. Yes. Recompiled or patched. Recompiling would be the easiest way, but could be done only by: the developer someone else, if the code is open source. Patching is not reliable, but could additionally be done by: the hardware (PlusCart/UnoCart) before emulating the ROM. This is probably very difficult to achieve. a tool the user has to download. a webservice where the user uploads his binary. the PlusStore before sending the binary (will only work with the PlusCart). 1 hour ago, Andrew Davie said: I'd be prepared to assist, where possible! The incredibly fast, talented and helpful developer of gopher2600 @JetSetIlly has already added a switch to the config, so we can switch between the different ARM chips. For DPC+ I have already build some test ROMs that work with gopher2600 and partly also with the PlusCart. For CDFJ we would need a modified (recompiled) test ROM where the ARM memory base addresses are moved like this: Harmony PlusCart/UnoCart ARM_RAM_BASE 0x40000000 0x10000000 ARM_ROM_BASE 0x0000 0x20000000 this ROM can be tested on gopher2600 when the "hardware.arm7.model" property in the preferences file (https://github.com/JetSetIlly/Gopher2600#configuration-directory) has been switched from: hardware.arm7.model :: LPC2000 to: hardware.arm7.model :: STM32F407VGT6 Link to comment Share on other sites More sharing options...
JetSetIlly Posted December 6, 2021 Share Posted December 6, 2021 29 minutes ago, Al_Nafuur said: this ROM can be tested on gopher2600 when the "hardware.arm7.model" property in the preferences file (https://github.com/JetSetIlly/Gopher2600#configuration-directory) has been switched from: hardware.arm7.model :: LPC2000 to: hardware.arm7.model :: STM32F407VGT6 To be clear, this only changes the memory map. Cycle counting will be different - it'll be similar but there's bound to be differences. 1 Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted December 6, 2021 Share Posted December 6, 2021 Is it really that simple? That you only change the memory map and a program written for Harmony will run on PlusCart and vice versa? Aren't there any special functions used which differ between hardware? Same for emulation. Just change the address offsets and then you can emulate programs written for STM32F? Link to comment Share on other sites More sharing options...
JetSetIlly Posted December 6, 2021 Share Posted December 6, 2021 59 minutes ago, Thomas Jentzsch said: Is it really that simple? That you only change the memory map and a program written for Harmony will run on PlusCart and vice versa? Aren't there any special functions used which differ between hardware? Same for emulation. Just change the address offsets and then you can emulate programs written for STM32F? I expect there'll be other complications but the first step was to change the memory map for the new processor. I left it with @Al_Nafuur but I got the impression that he had compiled Harmony programs for the PlusCart's CPU and managed to get them running. This is the memory map definitions for Gopher2600. As you can see, I've not identified the registers for the Timer or the MAM (I'm not even sure if there is a MAM in the STM32F). So as long as you don't need the timer then I suppose this is okay. https://github.com/JetSetIlly/Gopher2600/blob/a096d74b314ec9a54dd7b7a969023b796dad3feb/hardware/memory/cartridge/harmony/arm7tdmi/memorymap.go 1 Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted December 6, 2021 Share Posted December 6, 2021 Are there any PlusCart only test ROMs which use the ARM chip available? Link to comment Share on other sites More sharing options...
+Al_Nafuur Posted December 6, 2021 Share Posted December 6, 2021 8 minutes ago, Thomas Jentzsch said: Are there any PlusCart only test ROMs which use the ARM chip available? Public ROMs/DPC+ (experimental)/recompiled ARM/ I have posted the first version of the source code here: this version of the code is using different base addresses. 1 Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted December 6, 2021 Share Posted December 6, 2021 Yes, patching DPC+ is possible. But Andrew was asking for CDFJ. Any success with these? Link to comment Share on other sites More sharing options...
JetSetIlly Posted December 7, 2021 Share Posted December 7, 2021 10 hours ago, Thomas Jentzsch said: Yes, patching DPC+ is possible. But Andrew was asking for CDFJ. Any success with these? Not a problem for emulators, all the pieces are there, so it should work using the same ROM compilation method as for DPC+ ROMs. For the PlusCart itself, there needs to be a reimplement of the CDFJ functions that are present in the Harmony driver. Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted December 7, 2021 Share Posted December 7, 2021 6 minutes ago, JetSetIlly said: Not a problem for emulators, all the pieces are there, so it should work using the same ROM compilation method as for DPC+ ROMs. Do you have some test ROMs? Link to comment Share on other sites More sharing options...
JetSetIlly Posted December 7, 2021 Share Posted December 7, 2021 2 minutes ago, Thomas Jentzsch said: Do you have some test ROMs? No. Link to comment Share on other sites More sharing options...
+Al_Nafuur Posted December 7, 2021 Share Posted December 7, 2021 12 hours ago, Thomas Jentzsch said: Yes, patching DPC+ is possible. I only managed to recompile some DPC+ ROMs, with patching I had no success so far (haven't tried this hard). 12 hours ago, Thomas Jentzsch said: But Andrew was asking for CDFJ. Any success with these? I haven't tried so far. 1 hour ago, Thomas Jentzsch said: Do you have some test ROMs? that was what I vaguely asked for in my first post here. Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted December 7, 2021 Share Posted December 7, 2021 @Andrew Davie Maybe you could provide such a ROM (CDFJ compiled for PlusCart)? Then @Al_Nafuur, @JetSetIlly and the Stella team can start working on the issue. Link to comment Share on other sites More sharing options...
+Andrew Davie Posted December 7, 2021 Author Share Posted December 7, 2021 1 hour ago, Thomas Jentzsch said: @Andrew Davie Maybe you could provide such a ROM (CDFJ compiled for PlusCart)? Then @Al_Nafuur, @JetSetIlly and the Stella team can start working on the issue. I'd be happy to do it... if only I knew what to do. Link to comment Share on other sites More sharing options...
+Andrew Davie Posted December 7, 2021 Author Share Posted December 7, 2021 Maybe this requires the changes in "defines_cdfj.h" ...? // Raw queue pointers void* DDR = (void*)0x40000800; #define RAM ((unsigned char*)DDR) #define RAM_INT ((unsigned int*)DDR) #define RAM_SINT ((unsigned short int*)DDR) #define ROM ((unsigned char*)0) #define ROM_INT ((unsigned int*)0) #define ROM_SINT ((unsigned short int*)0) // Queue variables unsigned int* const _QPTR=(unsigned int*)0x40000098; unsigned int* const _QINC=(unsigned int*)0x40000124; unsigned int* const _WAVEFORM=(unsigned int*)0x400001B0; 1 Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted December 7, 2021 Share Posted December 7, 2021 3 minutes ago, Andrew Davie said: Maybe this requires the changes in "defines_cdfj.h" ...? Yup. Link to comment Share on other sites More sharing options...
+Al_Nafuur Posted December 7, 2021 Share Posted December 7, 2021 (edited) 6 minutes ago, Andrew Davie said: Maybe this requires the changes in "defines_cdfj.h" ...? // Raw queue pointers void* DDR = (void*)0x40000800; #define RAM ((unsigned char*)DDR) #define RAM_INT ((unsigned int*)DDR) #define RAM_SINT ((unsigned short int*)DDR) #define ROM ((unsigned char*)0) #define ROM_INT ((unsigned int*)0) #define ROM_SINT ((unsigned short int*)0) // Queue variables unsigned int* const _QPTR=(unsigned int*)0x40000098; unsigned int* const _QINC=(unsigned int*)0x40000124; unsigned int* const _WAVEFORM=(unsigned int*)0x400001B0; yes. basically everything with 0x4...... has to be moved to 0x1....... and everything with 0x0 has to be moved to 0x2....... AND: the memory definition in "custom/src/custom.boot.lds" has to be changed! Edited December 7, 2021 by Al_Nafuur add custom.boot.lds Link to comment Share on other sites More sharing options...
+Andrew Davie Posted December 7, 2021 Author Share Posted December 7, 2021 6 minutes ago, Al_Nafuur said: yes. basically everything with 0x4...... has to be moved to 0x1....... and everything with 0x0 has to be moved to 0x2....... Untested on anything... still trying to find the config for gopher.... But I changed the defs in the header file as indicated.... cubiks20211207PlusCart#1.bin Link to comment Share on other sites More sharing options...
+Andrew Davie Posted December 7, 2021 Author Share Posted December 7, 2021 Not sure what "custom_boot.lds" is, but it has an 0x4000 address too... OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) /* Entry Point */ ENTRY(Custom) /* LPC2103 memory areas */ MEMORY { boot (RX) : ORIGIN = 0x800 , LENGTH = 0x80 /* C-runtime booter */ C_code (RX) : ORIGIN = 0x880 , LENGTH = 0x6780 /* C code (26K) */ ram : ORIGIN = 0x40001800, LENGTH = 0x800 /* 2K free RAM */ /* ram : ORIGIN = 0x40001400, LENGTH = 0xC00 */ /* 3K free RAM, took 1K from Display Data */ /* ram : ORIGIN = 0x40001300, LENGTH = 0xD00 */ /* 3.25K free RAM, took 1.25K from Display Data */ /* ram : ORIGIN = 0x400012C0, LENGTH = 0xD40 */ /* 3392 bytes free RAM, took 1344 from Display Data */ } /* Global symbol _stack_end */ _stack_end = 0x40001FDC; /* Output sections */ SECTIONS { .bootcode : { _sboot = .; *(.boot) . = ALIGN(4); _eboot = .; } > boot .text : { .stext = .; . = ALIGN(4); *(.text) *(.text.*) *(.rodata) *(.rodata*) . = ALIGN(4); _etext = .; } >C_code .data : AT ( _etext ) { . = ALIGN(4); _sdata = .; *(.data) *(.data.*) . = ALIGN(4); _edata = .; } >ram .bss : { . = ALIGN(4); _sbss = .; *(.bss) *(COMMON) . = ALIGN(4); _ebss = .; } >ram } end = .; Link to comment Share on other sites More sharing options...
+Andrew Davie Posted December 7, 2021 Author Share Posted December 7, 2021 .. also custom.S /****************************************************************************** File: custom.S Description: Harmony Custom C Code Booter (C) Copyright 2016 - Chris Walton, Fred Quimby, Darrell Spice Jr ******************************************************************************/ /* Start in ARM mode */ .arm /* Put code in boot section */ .section .boot,"ax",%progbits /* Entry Point */ .global Custom .func Custom Custom: /* Switch to THUMB mode */ add r0, pc, #1 bx r0 .thumb /* Fetch value from CU header */ ldr r0, =0x40000024 ldr r2, [r0] /* Skip if data already copied */ cmp r2, #0 bmi SkipCopy add r2, #1 str r2,[r0] cmp r2, #1 bne SkipCopy /* Clear BSS section */ mov r0, #0 ldr r1, =_ebss ldr r2, =_sbss sub r1, r1, r2 ClearBssLoop: sub r1, #4 bmi EndClearBss str r0, [r2, +r1] bne ClearBssLoop EndClearBss: /* Copy C data section to RAM */ ldr r0, =_etext ldr r1, =_edata ldr r2, =_sdata sub r1, r1, r2 CopyLoop: sub r1, #4 bmi SkipCopy ldr r3, [r0, +r1] str r3, [r2, +r1] bne CopyLoop SkipCopy: /* Push return addess on stack */ push {lr} /* Put ReturnToBUS address in LR */ ldr r0, =ReturnToBUS+1 mov lr, r0 /* Jump to main in C code */ ldr r0, =main bx r0 ReturnToBUS: /* Return to BUS (switch to ARM mode) */ pop {r0} bx r0 Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted December 7, 2021 Share Posted December 7, 2021 1 minute ago, Andrew Davie said: Not sure what "custom_boot.lds" is, but it has an 0x4000 address too... Actually two. I am not 100% sure, but the (c_)boot memory addresses might have to be changed to. It's not easy to identify all the 0x addresses. These are often not defined as 0x0000.... but only as 0x..... Link to comment Share on other sites More sharing options...
+Al_Nafuur Posted December 7, 2021 Share Posted December 7, 2021 3 minutes ago, Andrew Davie said: Not sure what "custom_boot.lds" is, but it has an 0x4000 address too... these have to be changed too. 3 minutes ago, Andrew Davie said: .. also custom.S this doesn't need to be changed. The PlusCart (and the emulators too ?) don't run this Link to comment Share on other sites More sharing options...
+Andrew Davie Posted December 7, 2021 Author Share Posted December 7, 2021 5 minutes ago, Al_Nafuur said: these have to be changed too. this doesn't need to be changed. The PlusCart (and the emulators too ?) don't run this Here are my changed lines... /* LPC2103 memory areas */ MEMORY { boot (RX) : ORIGIN = 0x20000800 , LENGTH = 0x80 /* C-runtime booter */ C_code (RX) : ORIGIN = 0x20000880 , LENGTH = 0x6780 /* C code (26K) */ ram : ORIGIN = 0x10001800, LENGTH = 0x800 /* 2K free RAM */ } /* Global symbol _stack_end */ _stack_end = 0x10001FDC; cubiks20211207PlusCart#2.bin Link to comment Share on other sites More sharing options...
+Al_Nafuur Posted December 7, 2021 Share Posted December 7, 2021 14 minutes ago, Andrew Davie said: Untested on anything... still trying to find the config for gopher.... But I changed the defs in the header file as indicated.... cubiks20211207PlusCart#1.bin 32 kB · 1 download black screen, 6502 code is running.. Link to comment Share on other sites More sharing options...
Recommended Posts