7800 zeropage handling

[Schmutzpuppe]

Does anybody know in which ram adress the zero page from $40-$ff is shadowed?

 

Matthias

[Schmutzpuppe]

Got it, looks like it is $2000-$2040.

[DanBoris]

Actually it's $2040-$20FF.

 

Dan

[Schmutzpuppe]

Actually it's $2040-$20FF.

 

Dan

 

Ups, right.

Thanks.

[EricBall]

Don't forget the stack page

$0140 - $01FF is shadowed at $2140-$21FF and the stack grows bottom up (while ZP tends to be used top down).

[Schmutzpuppe]

Thanks for the hint.

I don't find this kind of mapping very elegant the mapping should be in a row and at the beginning or end of the ram.

Well, guess that have technical reasons.

 

Matthias

[EricBall]

Actually, I think it's kinda cool. GCC had some interesting constraints they had to work with, then build workarounds into the MARIA chip.

 

Okay, start with the 2600, really with the 6507 & RIOT. The RIOT only has 128 bytes of RAM, and for the stack to work it has to be mapped to $0180 - $01FF. Zero page uses the same RAM, mapped to $0080 - $00FF; easy to do, just don't connect one of the address lines. This leaves $0000 - $007F for the TIA registers with easy access.

 

Fast forward to the 7800, which has 4K of fast RAM mapped to $1800-$27FF. Built into the MARIA chip is an address decoder which (along with some external logic) has to handle 2600 mode addressing and 7800 modes (ROM & cart).

 

For compatibility & sanity, the TIA registers are still mapped to $0000 - $001F, and the MARIA registers $0020 - $003F, leaving $0040-$00FF for RAM. For simplicity, this gets shadowed to $2040-$20FF, and the stack ($0140-$01FF) to $2140-$21FF (again, only one address line different).