Pong Circuit Description

[DanBoris]

For anyone who hasn't seen my AtariAge blog yet, I have been using it to present an in depth description of how the original Atari Pong hardware works. If this sort of things interests you, check it out:

 

Dan's Blog

[supercat]

For anyone who hasn't seen my AtariAge blog yet, I have been using it to present an in depth description of how the original Atari Pong hardware works. If this sort of things interests you, check it out:

 

Dan's Blog

907933[/snapback]

 

Very interesting. I see that Atari used the paddle knobs in "RC mode" rather than voltage mode. I'm curious: were there no comparators like the LM311 available in 1971? Given that the 555 has two comparators built in, I would think that standalone comparator chips should have been available. I would think that two transistors, a few resistors, and a cap could be used to generate a nice sawtooth wave synchronized with the vertical sync; feeding the output of this wave into a couple of comparators would give the paddle 'trigger' signals needed for the paddle circuits.

 

I would think this approach would have saved a few components, and would also have reduced the risks of dirty/noisy pots.

 

BTW, on the horizontal timing circuit, the two 4-bit counters have their outputs fed back into a clock input. Any particular reason?

Edited August 10, 2005 by supercat

[DanBoris]

I took a look at an eletronics magazine from 1974, and it appears that the comparator IC's where actually more expensive then the 555 timer chips. Also the 555 is used for timing functions in other parts of the Pong circuit, so it was probably just easier to stay with a component they where already using.

 

The 7493 is a four bit binary counter, but the first stage of the counter is not connected internally to the other three stages. The output of the first stage comes out on QA and the clock for the second stage is CLKB, so they need to be connected together to form the full 4-bit counter.

[supercat]

Did the Arcade Pong work like the home version with a final score of 15? Was such a decision arrived at 'late'? It seems strange that the game goes through all the trouble to route the "tens" input into the multiplexor for the decoder, given that a single quad 2-input multiplexer could have handled the "1"'s digit, and the tens digit didn't really need to go through the segment decoder in the first place. Alternatively, a four-bit binary counter could have held each score, with the output of that fed into either a 7-segment decoder chip that was set up for the numbers 0-15, or else into a small bipolar PROM (the latter approach, depending upon the PROM size, might have simplified some of the other logic).