Was 16mhz the fastest 68000 accelerator ever made for ST line?

[oky2000]

I ask this because it has come to my attention that the A500 and A2000 Amiga line were treated to 28mhz 68000 accelerators by the Supra Corporation. I didn't even know that there were 28mhz 68000 rated CPUs! They do use a sophisticated interface and not the 68000 socket so no chance to re-engineer the boards back to an ST.

 

So does anyone know if 16mhz was the fastest accelerator board ever made for the ST? Did anyone make anything faster to use with the ST. Is this also related to why Atari chose a 16mhz 68030 for Falcon for compatibility (16mhz for a 68000 is scraping the bottom of the barrel in speed terms for an 030 design, 32mhz or 24mhz much more acceptable).

[+DarkLord]

I ask this because it has come to my attention that the A500 and A2000 Amiga line were treated to 28mhz 68000 accelerators by the Supra Corporation. I didn't even know that there were 28mhz 68000 rated CPUs! They do use a sophisticated interface and not the 68000 socket so no chance to re-engineer the boards back to an ST.

 

So does anyone know if 16mhz was the fastest accelerator board ever made for the ST? Did anyone make anything faster to use with the ST. Is this also related to why Atari chose a 16mhz 68030 for Falcon for compatibility (16mhz for a 68000 is scraping the bottom of the barrel in speed terms for an 030 design, 32mhz or 24mhz much more acceptable).

 

Hi. Nope, Fast Technology made 16mh, 20mhz and 25mhz 68000 based accelerators

for the Atari ST line. I've got an Adspeed in my Mega ST and I've got the T25

for my STacy.

 

There was also the PAK030 - it was a 68030 based accelerator. Very difficult

to find now, but lots of power.

 

Also, Dave Small had an '030 accelerator called the SST. I believe it ran at

40mhz, upped the memory to 12megs, and had TOS 2.xx in it.

 

There could easily be more, but that's all I recall off the top of my head.

 

Hope this helps.

[kool kitty89]

I ask this because it has come to my attention that the A500 and A2000 Amiga line were treated to 28mhz 68000 accelerators by the Supra Corporation. I didn't even know that there were 28mhz 68000 rated CPUs! They do use a sophisticated interface and not the 68000 socket so no chance to re-engineer the boards back to an ST.

Interesting, I didn;t know there were higher than 20 MHz rated 68ks on the market either (same for the 25 MHz ones)... although maybe they weren't actually manufactured as such: there are a number of cases of 3rd parties buying chips in bulk and regrading them at their real speed rating rather than the broad "sure thing" lower rating applied across the board for the mass manufacturers (that happened with ARM chips too among others). That adds cost overhead due to the regrading process, but would offer a range of product not offered elsewhere.

I wonder if that would have been a reasonable option for the Jaguar. (ie 26.6 MHz 68k rather than 13.3 MHz clocked 16 MHz rated chip)

There could have been earlier and lower-end cases of regrading too,though those would have fallen out of favor once higher rated versions from the primary manufacturers dropped enough.

 

 

So does anyone know if 16mhz was the fastest accelerator board ever made for the ST? Did anyone make anything faster to use with the ST. Is this also related to why Atari chose a 16mhz 68030 for Falcon for compatibility (16mhz for a 68000 is scraping the bottom of the barrel in speed terms for an 030 design, 32mhz or 24mhz much more acceptable).

It was obviously for cost reasons, the same reason they didn't push a 10 or 12 MHz 68k in the Amiga or ST back in 1985, but you're right, the Falcon line was too limited. The base model would have been fine with a 16 MHz 030 (or a 68EC020 would probably be the most attractive for the lower-end unit -unless they were willing to puch back to plain 68k -which would be more viable if faster 68ks had been on the market), but they should have made it a range from the start with higher-end models along the lower-end ones. (though you could argue the same thing back in 1985 with the ST lacking something more in the MEGA range and the Amiga not offering something closer to the A500)

And of course a 16 MHz 030 (even on a 16-bit bus) would be several times faster than a 68k at the same clock speed and with more efficient memory accessing. (something close to 3x as fast)

 

 

But back onto the main topic: when did the accelerators start to appear and how easy were they to install? (were they only available from 3rd parties?)

Edited November 26, 2010 by kool kitty89

[Rybags]

Most plugged into the CPU socket (replacing the 68000), not sure but there might have been sidecar type ones for the Amiga.

 

I can remember them appearing fairly early on.

[kool kitty89]

Most plugged into the CPU socket (replacing the 68000), not sure but there might have been sidecar type ones for the Amiga.

 

I can remember them appearing fairly early on.

Which models of the ST used socketed CPUs? (I've seen a lot of motherboard snapshots showing soldered 68ks -others with socketed PLCC chips but I don't recall any socketed DIPs on earlier models or PGAs for the TT or Falcon -I seem to recall both of the latter using surface mounted QFP) I'd imagine the MEGA models tended to have socketed CPUs (so maybe some earlier MEGAs had DIP sockets), but did any of the consoles have socketed CPUs other than the STe?

[+DarkLord]

Which models of the ST used socketed CPUs? (I've seen a lot of motherboard snapshots showing soldered 68ks -others with socketed PLCC chips but I don't recall any socketed DIPs on earlier models or PGAs for the TT or Falcon -I seem to recall both of the latter using surface mounted QFP) I'd imagine the MEGA models tended to have socketed CPUs (so maybe some earlier MEGAs had DIP sockets), but did any of the consoles have socketed CPUs other than the STe?

 

None that I'm aware of. You had to have the soldering skills to remove the original

68000, and reinstall a socket, or have someone else do it.

 

At least, all the 520s, 1040s, Mega STs, and STacys I've seen had to be done this

way.

[carmel_andrews]

Dk Lord.... Didn't third coast tech. do some nifty 68k series upgrades (I think they either had offices in the states or were based in the states)

[+DarkLord]

But back onto the main topic: when did the accelerators start to appear and how easy were they to install? (were they only available from 3rd parties?)

 

You know, I'm not 100% sure. Just looking at the manual, it says copyright 1990

for the Adspeed. I believe the Fast Tech stuff came out after ICD's stuff.

 

They were not easy - unless you had pretty good soldering skills and felt pretty

comfortable removing the 68000 from the motherboard and soldering a socket back

in its place.

 

As far as I remember, it was all 3rd party stuff.

 

HTHs.

 

PS Oh, there was a JATO accelerator board too. I don't think it was as much of

an upgrade (speed wise) as the other boards though.

[+DarkLord]

Dk Lord.... Didn't third coast tech. do some nifty 68k series upgrades (I think they either had offices in the states or were based in the states)

 

For some reason, I've got this hazy memory of Third Coast Tech being the group

that actually manufactured the stuff for ICD (Adspeed).

 

But I might be totally wrong.

 

Can anyone else verifiy this or not?

 

Thanks!

[Irgendwer]

I think 36MHz was the fastest (High Speed Board, German description here: http://wiki.newtosworld.de/HBS640xx ).

Edited November 26, 2010 by Irgendwer

[kool kitty89]

Which models of the ST used socketed CPUs? (I've seen a lot of motherboard snapshots showing soldered 68ks -others with socketed PLCC chips but I don't recall any socketed DIPs on earlier models or PGAs for the TT or Falcon -I seem to recall both of the latter using surface mounted QFP) I'd imagine the MEGA models tended to have socketed CPUs (so maybe some earlier MEGAs had DIP sockets), but did any of the consoles have socketed CPUs other than the STe?

 

None that I'm aware of. You had to have the soldering skills to remove the original

68000, and reinstall a socket, or have someone else do it.

 

At least, all the 520s, 1040s, Mega STs, and STacys I've seen had to be done this

way.

The STe and MEGA STe seem to use socketed PLCC 68ks though the falcon (not sure about TT) seems to use a surface mounted QFP 68030. The SHIFTER on the STe was also socketed and a PLCC chip rather than a DIP like on the older STs (I think early STs used SHIFTERs in 40 pin DIPs -not sure if any were socketed)

 

For your experience with the 520/1040/MEGA/STACY, are those all DIP 68000s or are some PLCCs?

 

 

In any case you wouldn't need to desolder the old CPU for an upgrade per-se as custom upgrade kits could have used a clip-on form factor to piggyback on the existing 68k like Cyrix did for surface mounted 386SX upgrades (perhaps requiring some jumpers though I don't think Cyrix's set-up used any). That sort of thing should also have been applicable for more than just a clip-on CPU upgrade, but a variety of upgrade/expansion boards somewhat like the Amiga 500 had using the 68k socket. (a blitter or audio upgrade could have been done that way -and similar clip-on boards could have been applied to other chips like the SHIFTER or YM2149) Atari didn't seem to be going in that direction though, more to sticking with closed box machines maybe with RAM expandability if anything. (other than general peripheral support)

 

 

 

 

All CPU accelerator boards had onboard RAM right? (to avoid the issue of working in the slower RAM at the higher speed) So that would be a separate bus running at a higher speed like Amiga's fastRAM?

I assume that would that mean the accelerator boards had circuitry to switch clock speeds on the fly to access shared system memory, or a wait state system to the same effect.

[+DarkLord]

The STe and MEGA STe seem to use socketed PLCC 68ks though the falcon (not sure about TT) seems to use a surface mounted QFP 68030. The SHIFTER on the STe was also socketed and a PLCC chip rather than a DIP like on the older STs (I think early STs used SHIFTERs in 40 pin DIPs -not sure if any were socketed)

 

For your experience with the 520/1040/MEGA/STACY, are those all DIP 68000s or are some PLCCs?

 

In any case you wouldn't need to desolder the old CPU for an upgrade per-se as custom upgrade kits could have used a clip-on form factor to piggyback on the existing 68k like Cyrix did for surface mounted 386SX upgrades (perhaps requiring some jumpers though I don't think Cyrix's set-up used any). That sort of thing should also have been applicable for more than just a clip-on CPU upgrade, but a variety of upgrade/expansion boards somewhat like the Amiga 500 had using the 68k socket. (a blitter or audio upgrade could have been done that way -and similar clip-on boards could have been applied to other chips like the SHIFTER or YM2149) Atari didn't seem to be going in that direction though, more to sticking with closed box machines maybe with RAM expandability if anything. (other than general peripheral support)

 

All CPU accelerator boards had onboard RAM right? (to avoid the issue of working in the slower RAM at the higher speed) So that would be a separate bus running at a higher speed like Amiga's fastRAM?

I assume that would that mean the accelerator boards had circuitry to switch clock speeds on the fly to access shared system memory, or a wait state system to the same effect.

 

Hmm, okay - thought we were just talking about the CPU. My bad. If you're talking about other chips, then yes,

various chips were socketed, even as far back as the original 520ST.

 

As far as the CPU goes though, on everything besides the STe, Mega STe, TT, etc, that I've seen, none have been socketed. (unless a third party did it)

 

I've not owned all the various accelerators that I've mentioned, but as far as I know, they do use onboard RAM, usually as a cache, to overcome the slower system memory speeds. The FastTech T series, and the ICD AdSpeed have the ability to switch speeds. I believe they have both software and hardware solutions for this switch. I know on the AdSpeed in my Mega ST, you can use an ACC (desk accessory) to switch between 8 and 16mhz "on the fly". The AdSpeed is also nice because it has a database that it will examine, where you can list programs and what speed to run them at. Very useful for games and obstinate apps.

 

Hope this helps.

[atarian1]

But back onto the main topic: when did the accelerators start to appear and how easy were they to install? (were they only available from 3rd parties?)

 

You know, I'm not 100% sure. Just looking at the manual, it says copyright 1990

for the Adspeed. I believe the Fast Tech stuff came out after ICD's stuff.

 

Actually, it's the other way around. The Fast Tech Turbo16 came out first before the AdSpeed. The AdSpeed was an improvement over the Turbo16 because it could revert back to a true 8MHz Atari.

[+DarkLord]

Actually, it's the other way around. The Fast Tech Turbo16 came out first before the AdSpeed. The AdSpeed was an improvement over the Turbo16 because it could revert back to a true 8MHz Atari.

 

Okay, my bad on the time-frame then. They (Fast Tech.) must have done some retro-writing on

their software then. Because the T16 I've got in one old Mega ST2 has software that switches

it between 8 and 16mhz...

 

Thanks.

[atarian1]

Actually, it's the other way around. The Fast Tech Turbo16 came out first before the AdSpeed. The AdSpeed was an improvement over the Turbo16 because it could revert back to a true 8MHz Atari.

 

Okay, my bad on the time-frame then. They (Fast Tech.) must have done some retro-writing on

their software then. Because the T16 I've got in one old Mega ST2 has software that switches

it between 8 and 16mhz...

 

Thanks.

What I mean by "true" 8MHz is exactly 8.0000... MHz. The T16 reverted back to 8.01 MHz or something like that. If you run a benchmark program on a T16'ed ST switched to 8MHz, you will see some of the benchmarks show 101% or something. A genuine 8MHz ST should have all their benchmarks say 100%. Some programs and games won't work due to this.

[+DarkLord]

What I mean by "true" 8MHz is exactly 8.0000... MHz. The T16 reverted back to 8.01 MHz or something like that. If you run a benchmark program on a T16'ed ST switched to 8MHz, you will see some of the benchmarks show 101% or something. A genuine 8MHz ST should have all their benchmarks say 100%. Some programs and games won't work due to this.

 

Well, that's odd. I didn't know that. Why did they do that? Oversight?

[atarian1]

What I mean by "true" 8MHz is exactly 8.0000... MHz. The T16 reverted back to 8.01 MHz or something like that. If you run a benchmark program on a T16'ed ST switched to 8MHz, you will see some of the benchmarks show 101% or something. A genuine 8MHz ST should have all their benchmarks say 100%. Some programs and games won't work due to this.

 

Well, that's odd. I didn't know that. Why did they do that? Oversight?

 

It's just another example of progress.

 

I'm sure Jim Allen @ Fast Tech took a look at the JATO and thought "how can I improve this JATO to give a real speed increase?". He did it by adding a cache and also made it smaller. I guess he couldn't figure out how to make it revert back to a true 8 MHz so he just left it at that.

 

Then ICD took a look at the T-16 and thought "how can I improve this T-16 to revert back to a true 8MHz?". I don't know what they did, but they did it AND made is even smaller to barely larger than the 68000 CPU itself. It just shows how awesome those ICD engineers were.

[kool kitty89]

I'd hazard a guess that they were using an onboard oscillator of lower precision than the native ST oscillator so you tended to get less than a perfect 8.000 clock rate (though if that was the only issue, it would imply that some might default to 7.99 MHz and not 8.01), or the oscillators for that rate were cheaper/more common or something else. (especially if it's an on-chip clock generator and not external)

 

However, it would seem simplest/cheapest to purely piggyback on the native 8 MHz signal from the ST 68k itself and use a simple multiplier circuit to double the clock for 16 MHz mode, that would have been simpler and cheaper than an on-chip or on-board discrete oscillator (plus you'd need circuitry to switch speed anyway), so it's odd they didn't go that route. (8/16/24 MHz would be cheap and easy to do that way -32 MHz too, but I don't think they went that high unless you got into 020/030 or higher -technically you COULD have 68ks at that speed and if re-grading of 16 MHz chips saw high enough yeilds for that, it could have been done as with the 25 MHz cases)

 

 

Any idea on the original cost of the accelerator boards back then?

Edit: found an interesting article on the subject:

http://www.atarimagazines.com/startv4n5/speed.html

 

It seems like most/all systems took to the desoldering route and not a clip-on type solution and some boards even offered blitter or 68881 sockets. A socketed 68k could have really simplified things, but then again Atari Corp didn't seem particularly interested in an upgradable design or providing upgrade services at licensed service centers. (did they ever even offer the piggyback RAM upgrade or was that only done by voiding the warranty?)

 

For that matter it seems like a 16 MHz model of the plain ST could have been very significant, especially if the price wasn't a huge step from the better accelerator boards of the time.

 

 

 

That article also brings up the critical issue of the ST's interleaved DMA... so that would definitely be a hurdle to overcome before moving onto faster 68ks onboard the ST. (a separate CPU-only bus of work RAM like fastRAM in the Amiga would be a simple solution but add to cost, and the max you could practically do in the late 80s with interleaved random accesses to DRAM would be using a 10 MHz 68k and system bumped up to do 200 ns interleaved accesses rather than 250 ns with 100 ns DRAM rather than 125 ns -beyond that you'd need more caching/buffering for the 68k and/or video hardware to manage significantly improved performance beyond 8 MHz -a fastRAM set up wouldn't be a bad idea though, especially starting with higher-end machines like the MEGA and perhaps simplify compatibility once they moved to 32-bit chips)

More comprehensive expansion boards could have added larger blocks of onboard memory for such purposes too. (ie adding a faster CPU and 512 kB of DRAM) It doesn't seem like that ever happened though. (probably cost prohibitive for the range the accelerator boards were aimed at)

Hmm, launching the MEGA-1 with 512 kB of CPU RAM plus 512 kB shared RAM and a 16 MHz 68k probably would have been better than pushing the blitter (if you had to pick one) and allow roughly double the overall speed (much more than most accelerators) with only hits while accessing the shared bus. (even more significant in hindsight given the delay of the Blitter)

 

And then adding that capability to lower-end console STs as well. (like 520s with 16 MHz CPUs stick at 8 MHz by default but expanding to 16 MHz with added RAM expansion, and 1040 models with expanded RAM onboard... or perhaps the faster CPUs should have started with the introduction of the 1040 rather than the MEGA with 12 or 16 MHz CPU versions offered)

Edited November 29, 2010 by kool kitty89

[oky2000]

Fascinating stuff, I never knew the 68000 was clocked so high actually. Don't know if I would buy one though as 28mhz <> 4x faster execution of code on Amiga and presume a 32mhz 68000 on ST <> 4x Starglider II.

 

I think the 16mhz boards give you 10-20% increase right so at best it will feel like a 12mhz ST with a quad speed 68000 piggybacked onboard?

[kool kitty89]

Fascinating stuff, I never knew the 68000 was clocked so high actually. Don't know if I would buy one though as 28mhz <> 4x faster execution of code on Amiga and presume a 32mhz 68000 on ST <> 4x Starglider II.

 

I think the 16mhz boards give you 10-20% increase right so at best it will feel like a 12mhz ST with a quad speed 68000 piggybacked onboard?

Given the above article it really depended on the accelerator used and corresponding software. (one went up to 50% faster, but with much more caching than some others)

 

On the Amiga 2000/500/etc with fastRAM, a 2x CPU should be 2x as fast though. (not without fastRAM)

 

I wonder how they modified the memory configuration in the MSTE to allow the 16 MHz 68k. (unless they actually used RAM that was fast enough for 125 ns random accesses -which would be something like 50 ns DRAM- but that wouldn't be a very cost effective solution)

[+DarkLord]

Most, if not all, of the accelerators from ICD and Fast Tech. used

some sort of cache.

 

I'm fairly certain the Mega STe had some setup like that as well.

I know the four 1-meg SIMMs were the same in the STe and the Mega

STe...

[wongck]

From what I remember on my Mega STE, there was a cache setting on the CPU.

I can't find my benchmarks from my old backups (may be it will turn up some day)

so I can't tell you if it is 2x the speed of an ST.

The main memory are not FastRam just normal ST speed I guess.

[oky2000]

Fascinating stuff, I never knew the 68000 was clocked so high actually. Don't know if I would buy one though as 28mhz <> 4x faster execution of code on Amiga and presume a 32mhz 68000 on ST <> 4x Starglider II.

 

I think the 16mhz boards give you 10-20% increase right so at best it will feel like a 12mhz ST with a quad speed 68000 piggybacked onboard?

Given the above article it really depended on the accelerator used and corresponding software. (one went up to 50% faster, but with much more caching than some others)

 

On the Amiga 2000/500/etc with fastRAM, a 2x CPU should be 2x as fast though. (not without fastRAM)

 

I wonder how they modified the memory configuration in the MSTE to allow the 16 MHz 68k. (unless they actually used RAM that was fast enough for 125 ns random accesses -which would be something like 50 ns DRAM- but that wouldn't be a very cost effective solution)

 

To get double the speed by doubling the CPU you need double the DMA bandwidth and double the memory access speed too. Neither the ST/STE chipset or Amiga chipset was changed so the limiting factor on both would be waiting your turn between other 8mhz based audio/video/FD controller requests I guess.

 

On the Amiga even if you have an 020/030 plugged into the 68000 socket and full zero wait state Fast RAM it won't ever give you a great improvement in games or anything audio/video related as again the limiting factor is the speed of the chipset, leaving the CPU idle far too long waiting for the blitter to do its thing (ditto for STE/Mega with blitter or PCM sample sound I guess).

[Cliff Friedel]

I am not sure if this is fact, but from memory, I recall a 40MHz 68040 accelerator board for the Amiga towards the end of its run. I just checked online and some of the accelerators did indeed have a 40 MHz MC68040 in them. One was called the Warp Engine. There were others though. Can't believe I remembered that off of the top of my head. I wonder what memory was erased because of that nugget of knowledge. Probably fishing with my dad. =)

[kool kitty89]

Fascinating stuff, I never knew the 68000 was clocked so high actually. Don't know if I would buy one though as 28mhz <> 4x faster execution of code on Amiga and presume a 32mhz 68000 on ST <> 4x Starglider II.

 

I think the 16mhz boards give you 10-20% increase right so at best it will feel like a 12mhz ST with a quad speed 68000 piggybacked onboard?

Given the above article it really depended on the accelerator used and corresponding software. (one went up to 50% faster, but with much more caching than some others)

 

On the Amiga 2000/500/etc with fastRAM, a 2x CPU should be 2x as fast though. (not without fastRAM)

 

I wonder how they modified the memory configuration in the MSTE to allow the 16 MHz 68k. (unless they actually used RAM that was fast enough for 125 ns random accesses -which would be something like 50 ns DRAM- but that wouldn't be a very cost effective solution)

 

To get double the speed by doubling the CPU you need double the DMA bandwidth and double the memory access speed too. Neither the ST/STE chipset or Amiga chipset was changed so the limiting factor on both would be waiting your turn between other 8mhz based audio/video/FD controller requests I guess.

 

On the Amiga even if you have an 020/030 plugged into the 68000 socket and full zero wait state Fast RAM it won't ever give you a great improvement in games or anything audio/video related as again the limiting factor is the speed of the chipset, leaving the CPU idle far too long waiting for the blitter to do its thing (ditto for STE/Mega with blitter or PCM sample sound I guess).

Sort of... for the Amiga with fastRAM you should have the CPU and chipset running in nearly full parallel, so unlike a system with just chipRAM the chipset can saturate the chipram bus rather than be stuck at 1/2 speed to allow the 68k to share or halting the 68k to saturate the bus, so you'd have the chipset with 7.16 MB/s almost all the time rather than 3.58 MB/s. Even without faster clocked RAM you'd have the possibility of enabling fast page mode on later chipset revisions, but without more buffering for the blitter or other chips, or (especially) packed pixel support, fast page mode would be of limited utility in some areas. (using wider buses on the chipset would be another factor, ie 32 or 64-bit rather than 16-bit -Atari did opt for a 64-bit bus on the TT SHIFTER)

 

But even with the OSC, that's a big help with the chipset allowed to saturate the bus and the CPU being full speed: plus with fastRAM even at the same speed as chipRAM you could have a 14.3 MHz 68000 without wait states while if you did that in chipRAM it would be purely limited to serial bus accesses.

 

 

On the ST you have far less bus sharing in general so with just the SHIFTER being the major contending force on the bus, there's roughly 40% bandwidth left over for the shifter's half of DMA. (maybe a bit more depending just how much of Vblank and Hblank is free) So even without an additional bus, faster RAM, or modified DMA (beyond adding wait states for the 68k) you could have up to ~40% speed boost with the 68k running faster and in series with the SHIFTER.

 

The interleaving used in the ST and Amiga is only practical for slow systems and gets impractical very quickly as you increase system speed (of CPU and coprocessors) to the point that you'd need very fast RAM to even interleave with a 16 MHz 68k. (a 12 MHz 68k would be pushing it even, though 10 MHz would be realistic in the late 80s) The reason is that random accesses don't speed up in a linear fashion with CAS timing and you get diminishing returns with faster and faster DRAM, but fast page mode, burst mode, and interleaved banks of RAM became the solutions to those problems as time went on. (page mode is the earliest and cheapest option and fast page DRAM was cheap and common by the late 1980s and early 1990s -EDO DRAM didn't get cheap until the mid 90s and slower varieties of SDRAM not until the late 90s -though SDRAM was also attractive because it's cheaper and simpler to interface to)

 

So serial bus sharing with lots of caching and buffering therefore gets far more attractive very quickly, hence why the former Amiga engineers opted for full serial bus sharing on the Lynx to allow the chipset to access the 125 ns fast page mode DRAM at full 8 MHz in series along with the 4 MHz 65C02. (random accesses would be 250 ns like the ST) That's also what the Jaguar opted for naturally and its 68k was too fast to even interleave a single 175 ns random access, and also why interleaved accesses are to avoided at all costs on such systems as every time you change a bus master you get a page break and a single (slow) random access before you get fast page accesses again. The longer you can practically chain page mode accesses, the closer you get to a system consistently running at the peak page mode bandwidth. (that's also why the Jaguar's line buffers are so important, so allow long bursts of fast page accesses within a single DRAM bank and bus -and also part of why texture mapping is weak as it wasn't buffered and thus breaks page mode every single access, the other solution beyond buffering to stay in page mode for such operations is to have separate buses and/or banks of DRAM that can be accessed independently -separate banks can only be accessed concurrently though, and the Jag supported 2 bank interleaving as such, but to keep cost down they didn't implement it as it takes more RAM chips and traces -and buffering is a far more cost effective option, but in 1990 affine texture rendering wasn't one of the areas flare guessed would be critical for 3D -which was all wire mesh or solid shaded polygons at the time)

 

 

 

But with a 68020 or more so an 030, you'd have the caches to speed things up as well and allow the CPUs to spend more time off the bus in general regardless of the bus speed. With caches off the advantages over the 68k are far more limited and the 030 is no better than an 020 of equal speed.

Using the caches is critical for good performance on a high-speed shared bus, that's also why you see the Jag programmers musing on how useful a CPU with a cache would have been.

 

 

Edit: One really interesting possibility would be using a 2 bank interleaving technique (but still a single shared bus) so you could keep fast page accesses going while interleaving with 2 bus masters in separate banks. (not as powerful as separate buses, but cheaper for sure, though not as cheap as a single shared bank... depending on the amount of RAM used in the system you wouldn't even use more RAM chips, just wider width chips and more traces -on some models you already have double the width anyway, so all you'd need is the DMA and bank switching logic)

You'd need a redesign to the DMA controller for that (and the custom chips would need to run fast enough to use page mode efficiently), but that could definitely be an interesting possibility.

Edited November 30, 2010 by kool kitty89