UNIXcoffee928 Posted June 28, 2011 Share Posted June 28, 2011 I've been reading the four part article on the XL's Parallel Bus in Antic Volume 3, issues 9-12, and I was wondering if people who are experienced with designing PBI devices could share their knowledge on the subject. For instance, could someone describe, in a detailed, tutorial-like fashion, how to build and implement a super simple device, like a 7-Segment Display, that could be controlled via the PBI, from both a hardware and software handler point of view? Thanks! Quote Link to comment Share on other sites More sharing options...
flashjazzcat Posted June 28, 2011 Share Posted June 28, 2011 This sounds like an excellent suggestion. I've been reading through the same material, as well as this: Parallel Bus / Enhanced Cartridge / DMA Interface However, while I just about know how to write a driver, the hardware side is still over my head. A tutorial would be fascinating. Quote Link to comment Share on other sites More sharing options...
Raul Vasbutin Posted June 28, 2011 Share Posted June 28, 2011 I too would welcome such an effort. While working at TV Guide a while back I was fascinated by their use of an ECI device on the 130xe to receive a sat signal and grab the guide data off of it. This is what renewed my interest in the Atari 8-bit computers. I had a few weeks in-between work projects last Christmas and, going throught the same article, I researched and purchased all the components on the PBI parts list but have not done anything with them yet. Quote Link to comment Share on other sites More sharing options...
+rdemming Posted June 28, 2011 Share Posted June 28, 2011 I wonder if a PBI device could directly write to ram (DMA) like a C64 cartridge can. Or must data from a PBI interface always be transferred by the 6502? At first sight it seems to me the PBI bus is lacking the signals to do DMA. Robert Quote Link to comment Share on other sites More sharing options...
Rybags Posted June 28, 2011 Share Posted June 28, 2011 That's only the half of it. The other problem is that DMA coming via Antic is sporadic depending on what DList you have setup, what DMA mode, if PMG DMA is enabled etc. So, to determine what Antic is likely to be doing, we'd want /HALT which the PBI doesn't have and also a copy of the CSYNC output from which we could deduce where a frame starts. The only fully guaranteed predictable zone is outside the normal 240 scanline area where only Refresh occurs, but you're only talking a fraction of available time. Compensating for the 9 lost DMA cycles/line you then get: PAL - 378,000 cycles/second NTSC - 138,600 cycles/second Additional to that, there are also cycles within normal display scanlines that are always free (8 [?] cycles per scanline) which would give additional slots: PAL - 96,000 NTSC - 115,200 Alternatively to having the extra signalling (aside from /HALT), another possibility: Have the external device running at a multiple of the system base clock, e.g. 7.1~ MHz Assert /RDY to put 6502 into a holding pattern. This needs to be done earler than the access is required, since the 6502 doesn't stop immediately. At the start of a cycle, sample the /HALT line. If it's not asserted, that should mean the external peripheral can put it's own address, data, /Write signal onto the bus. Since the peripheral is clocked at a multiple of the Atari, such a scheme should work, provided the RAM is willing to put up with slightly shorter /CAS cycles. Quote Link to comment Share on other sites More sharing options...
Bryan Posted June 28, 2011 Share Posted June 28, 2011 Yeah, you're much better off having the PBI device take over as much address space as possible and then "being" the RAM rather than transferring into it. Quote Link to comment Share on other sites More sharing options...
Rybags Posted June 28, 2011 Share Posted June 28, 2011 Yeah, that's another possibility. The next best thing to DMA is a RAM paging where the peripheral can have exclusive access to the page when desired. Then the 6502 just has to move the I/O data to where it's needed. Still gives a fairly massive theoretical I/O throughput, and would simplify the interface substantially. Quote Link to comment Share on other sites More sharing options...
+rdemming Posted June 28, 2011 Share Posted June 28, 2011 (edited) I could have known that the (to a PBI device) un-deterministic behaviour of ANTIC DMA makes DMA very difficult. You can halt the CPU, but not ANTIC. Unless you do DMA transfers with ANTIC turned off? Robert Edited June 28, 2011 by rdemming Quote Link to comment Share on other sites More sharing options...
Rybags Posted June 28, 2011 Share Posted June 28, 2011 You don't turn Antic off though - Refresh will always be there. Hence the need to know where in a frame you are, which means having all those missing signals. Quote Link to comment Share on other sites More sharing options...
sloopy Posted June 28, 2011 Share Posted June 28, 2011 That's only the half of it. The other problem is that DMA coming via Antic is sporadic depending on what DList you have setup, what DMA mode, if PMG DMA is enabled etc. So, to determine what Antic is likely to be doing, we'd want /HALT which the PBI doesn't have and also a copy of the CSYNC output from which we could deduce where a frame starts. The only fully guaranteed predictable zone is outside the normal 240 scanline area where only Refresh occurs, but you're only talking a fraction of available time. Compensating for the 9 lost DMA cycles/line you then get: PAL - 378,000 cycles/second NTSC - 138,600 cycles/second Additional to that, there are also cycles within normal display scanlines that are always free (8 [?] cycles per scanline) which would give additional slots: PAL - 96,000 NTSC - 115,200 Alternatively to having the extra signalling (aside from /HALT), another possibility: Have the external device running at a multiple of the system base clock, e.g. 7.1~ MHz Assert /RDY to put 6502 into a holding pattern. This needs to be done earler than the access is required, since the 6502 doesn't stop immediately. At the start of a cycle, sample the /HALT line. If it's not asserted, that should mean the external peripheral can put it's own address, data, /Write signal onto the bus. Since the peripheral is clocked at a multiple of the Atari, such a scheme should work, provided the RAM is willing to put up with slightly shorter /CAS cycles. this wont work, when /RDY is asserted the address lines of the 6502 stay at the state they were in, giving the address it is trying to read, which makes the address bus useless... there is one way of doing DMA on a PBI, and it would require an XL with system ram on the PBI device (like a 1064), where it can control ram completely... sloopy. Quote Link to comment Share on other sites More sharing options...
+rdemming Posted June 28, 2011 Share Posted June 28, 2011 You don't turn Antic off though - Refresh will always be there. Of course, thats true. Only the screen DMA will be off, but ANTIC still needs to refresh the DRAM chips meaning occupying the bus. Quote Link to comment Share on other sites More sharing options...
Rybags Posted June 28, 2011 Share Posted June 28, 2011 this wont work, when /RDY is asserted the address lines of the 6502 stay at the state they were in, giving the address it is trying to read, which makes the address bus useless... Got doubts there... sure, /RDY isn't instant, you need that one or two cycles pre-emptiveness. If the 6502 hogged the address lines during /RDY, then WSYNC would become a useless facility, how would Antic do it's DMA otherwise? Quote Link to comment Share on other sites More sharing options...
drac030 Posted June 28, 2011 Share Posted June 28, 2011 we'd want /HALT which the PBI doesn't have But ECI does have HALT. I think it's only intended as output, for an external 130XE-compatible RAM extension. Quote Link to comment Share on other sites More sharing options...
Bryan Posted June 28, 2011 Share Posted June 28, 2011 Yeah, HALT takes the 6502 off the bus. RDY just stops it where it is. WSYNC asserts RDY but Antic keeps hitting HALT on its cycles. Quote Link to comment Share on other sites More sharing options...
Rybags Posted June 28, 2011 Share Posted June 28, 2011 (edited) The impression I got was: /HALT is the Sally implementation of the circuitry that holds the 6502 in the low clock phase for an extended period, regardless of what part of instruction processing takes place, and releases it from the bus /RDY is universal to 6502 and releases the 6502 off the bus and puts it in hold without affecting the clocking, but any pending writes will still take place, so up to 2 cycles wait is needed, e.g. if hit during a RMW instruction such as ROL, INC etc. Edited June 28, 2011 by Rybags Quote Link to comment Share on other sites More sharing options...
Bryan Posted June 28, 2011 Share Posted June 28, 2011 The impression I got was: /HALT is the Sally implementation of the circuitry that holds the 6502 in the low clock phase for an extended period, regardless of what part of instruction processing takes place, and releases it from the bus /RDY is universal to 6502 and releases the 6502 off the bus and puts it in hold without affecting the clocking, but any pending writes will still take place, so up to 2 cycles wait is needed, e.g. if hit during a RMW instruction such as ROL, INC etc. The 6502 does not natively have a tri-state address bus, but Sally does. It is only activated in conjunction with HALT. Quote Link to comment Share on other sites More sharing options...
+bob1200xl Posted June 28, 2011 Share Posted June 28, 2011 Yes, exactly. The PBI can move all the system RAM out onto the bus using the EXTENB line. With fast SRAM and some latches, you can run memory cycles as much as you wish, up until the time that data has to be on the bus for the system. Doesn't matter if it is ANTIC or the CPU that is accessing memory - all they need is one 70ns slice after the addresses are stable. You could run 7 DMA cycles and one SYSTEM cycle every clock period... Only guy that needs HALT is the CPU. As for PBI in general, where does it seem unclear? Bob That's only the half of it. The other problem is that DMA coming via Antic is sporadic depending on what DList you have setup, what DMA mode, if PMG DMA is enabled etc. So, to determine what Antic is likely to be doing, we'd want /HALT which the PBI doesn't have and also a copy of the CSYNC output from which we could deduce where a frame starts. The only fully guaranteed predictable zone is outside the normal 240 scanline area where only Refresh occurs, but you're only talking a fraction of available time. Compensating for the 9 lost DMA cycles/line you then get: PAL - 378,000 cycles/second NTSC - 138,600 cycles/second Additional to that, there are also cycles within normal display scanlines that are always free (8 [?] cycles per scanline) which would give additional slots: PAL - 96,000 NTSC - 115,200 Alternatively to having the extra signalling (aside from /HALT), another possibility: Have the external device running at a multiple of the system base clock, e.g. 7.1~ MHz Assert /RDY to put 6502 into a holding pattern. This needs to be done earler than the access is required, since the 6502 doesn't stop immediately. At the start of a cycle, sample the /HALT line. If it's not asserted, that should mean the external peripheral can put it's own address, data, /Write signal onto the bus. Since the peripheral is clocked at a multiple of the Atari, such a scheme should work, provided the RAM is willing to put up with slightly shorter /CAS cycles. this wont work, when /RDY is asserted the address lines of the 6502 stay at the state they were in, giving the address it is trying to read, which makes the address bus useless... there is one way of doing DMA on a PBI, and it would require an XL with system ram on the PBI device (like a 1064), where it can control ram completely... sloopy. Quote Link to comment Share on other sites More sharing options...
Rybags Posted June 28, 2011 Share Posted June 28, 2011 The missing links for me is a bit on the software side too. Like when initialisation occurs, how device/driver handling occurs. Does the PBI have anything to do with the relocatable handler loader, or is that just a SIO thing, or both ? Actually, the XL OS isn't that well documented when compared to the original OS. The information is probably mostly/all out there, but not in the one handy document like the older one. Quote Link to comment Share on other sites More sharing options...
sloopy Posted June 28, 2011 Share Posted June 28, 2011 The missing links for me is a bit on the software side too. Like when initialisation occurs, how device/driver handling occurs. Does the PBI have anything to do with the relocatable handler loader, or is that just a SIO thing, or both ? Actually, the XL OS isn't that well documented when compared to the original OS. The information is probably mostly/all out there, but not in the one handy document like the older one. dunno if you have seen this... ftp://ftp.pigwa.net/stuff/collections/atari_forever/www-magazines/MyAtari.net/07/pbi.htm need to chase pointers to the other articles in the series... also, i have been compiling info on Atari PBI, and all the info i collect on it will eventually be put on AtariPBI.info / AtariPBI.com , but the day job and RL has gotten in the way of getting it done... sloopy. Quote Link to comment Share on other sites More sharing options...
Rybags Posted June 28, 2011 Share Posted June 28, 2011 (edited) Found part 2 ftp://ftp.pigwa.net/stuff/collections/atari_forever/www-magazines/MyAtari.net/09/xl_pbi.htm Part 3 ftp://ftp.pigwa.net/stuff/collections/atari_forever/www-magazines/MyAtari.net/10/pbi_p3.htm PC Bridge (interface ISA cards to PBI) ftp://ftp.pigwa.net/stuff/collections/atari_forever/www-magazines/MyAtari.net/13/pcbridge.htm Edited June 28, 2011 by Rybags Quote Link to comment Share on other sites More sharing options...
sloopy Posted June 28, 2011 Share Posted June 28, 2011 Found part 2 ftp://ftp.pigwa.net/stuff/collections/atari_forever/www-magazines/MyAtari.net/09/xl_pbi.htm Part 3 ftp://ftp.pigwa.net/stuff/collections/atari_forever/www-magazines/MyAtari.net/10/pbi_p3.htm PC Bridge (interface ISA cards to PBI) ftp://ftp.pigwa.net/stuff/collections/atari_forever/www-magazines/MyAtari.net/13/pcbridge.htm yeah i have local versions, started to edit them for my web site... sloopy. Quote Link to comment Share on other sites More sharing options...
UNIXcoffee928 Posted June 28, 2011 Author Share Posted June 28, 2011 .... As for PBI in general, where does it seem unclear? Bob Well, despite us all getting a little "long in tooth", some of us are more software-oriented, some of us are more hardware-oriented, some of us are more systems or network-oriented, and some of us are generalists, who try to grasp everything, and have varying degrees of knowledge, ranging from novice to expert, in a number of of different areas. Personally, I've always been more systems & software-oriented. While I have a great admiration for Electrical Engineers, as much as I have studied scores of books, over the years, trying to gain entrance to the Magic Kingdom of being able to Build Anything, (and this hurts to say...) ... I still can't. Strangely, I have remained at some weird point of being an "intermediate novice" with electronics, for most of my life. I say "strangely" because I've studied & understood Discrete Structures & Formal Logic, schematics, soldered up plenty of small devices & cables, worked with breadboards, etc... In general, put in quadruple the effort of someone who takes to this stuff easily, to the effect of being "much better than the average Joe", but still very far from being any type of Electronics Wizard that can design & build anything that they can conceive of. For me it's even more frustrating, because I understand both the basics, and many of the more advanced areas of electronics... It's that stuff somewhere in the middle where it gets hazy for me. This is probably because I never acquired any test equipment more powerful than a Multimeter... I don't know, I probably should go to a tech school or something, to fill in the areas that are fuzzy to me, but I thought that just sitting down a building more devices would help me to learn what I feel that I'd like to know. I am a practical sort, so I figured that I'd pick up an 800XL that I'm not too emotionally attached to, and begin a campaign of starting from scratch trying to learn how to build useful devices for the underused PBI. I am also very curious to be able to use the knowledge that I gain from it to attempt to design an interface for the original Atari 800's "Test Points" Connector, which is completely undocumented. I figured that by studying the PBI, then working backwards, once I understood it, that I might be able to realize this goal. Ha, so what don't I understand? I wish that I was already at the point that I could know what I don't understand, on this one... but I'm not... That's why I asked if someone could, step by step, explain, for novices, how to connect & control a single 7-segment LED... that I do understand, ha... and If I could learn how a single one works, then, later, I can figure out how multiple ones work, and build something useful, like a Stopwatch, or something, to better understand output. After that, I would ask how to interface a single switch to the PBI, then 8 switches, to better understand input. I know that this is Heavily Dumbed-Down Stuff (HDDS, lol) but if someone could take the time to really delve into the extreme basics of interfacing to the PBI, it would give a lot more people the Keys to the Kingdom, so to speak, and I think that the end result might be that we would see a lot more practical development for the PBI, in the future. ... Actually, the XL OS isn't that well documented when compared to the original OS. The information is probably mostly/all out there, but not in the one handy document like the older one. Here are the XL sources: http://www.atariage....ost__p__2306850 I provided instructions on how to convert the files to .pdf format. I will, eventually, clean them up, and make the whole thing into a big .pdf, but I haven't gotten to it, yet. Quote Link to comment Share on other sites More sharing options...
UNIXcoffee928 Posted June 28, 2011 Author Share Posted June 28, 2011 ... where does it seem unclear? Bob OK, well, for starters, is there a comprehensive list of the signals that are used in Atari computers? As I had mentioned, part of my interest in the PBI is to work backwards, and better define the Atari 800's Test Points Interface... When I look at the schematic for the card edge of the 800, I can't make hide nor hare of what the hell the signal designators (all the way to the top, before the arrows) relate to, when I follow the traces back... can someone explain how to read this, and how these signals relate to other signal designators before them, along (what appears to be) the same trace? Quote Link to comment Share on other sites More sharing options...
sloopy Posted June 28, 2011 Share Posted June 28, 2011 ... where does it seem unclear? Bob OK, well, for starters, is there a comprehensive list of the signals that are used in Atari computers? As I had mentioned, part of my interest in the PBI is to work backwards, and better define the Atari 800's Test Points Interface... When I look at the schematic for the card edge of the 800, I can't make hide nor hare of what the hell the signal designators (all the way to the top, before the arrows) relate to, when I follow the traces back... can someone explain how to read this, and how these signals relate to other signal designators before them, along (what appears to be) the same trace? They should be the pin designators for the test port... The signal names are within the 'connector' (i.e. A0-A15 are address lines 0 through 15), the names just outside the 'connector' box are the pin identifiers. They start with 1 and go to %X (%X= number of 'fingers' on that side of the connector), and the other side of the same connector is labeled with A through %Y (with %Y defined as %X...). so for example the CPU card has pins 1 through 28 on the component side, and A through FF on the 'solder' side (I,O, and a couple others of the alphabet arnt used to avoid confusion with numerals, and once you go A-Z it continues on AA, BB, CC, etc). sloopy. Quote Link to comment Share on other sites More sharing options...
UNIXcoffee928 Posted June 28, 2011 Author Share Posted June 28, 2011 ... where does it seem unclear? Bob OK, well, for starters, is there a comprehensive list of the signals that are used in Atari computers? As I had mentioned, part of my interest in the PBI is to work backwards, and better define the Atari 800's Test Points Interface... When I look at the schematic for the card edge of the 800, I can't make hide nor hare of what the hell the signal designators (all the way to the top, before the arrows) relate to, when I follow the traces back... can someone explain how to read this, and how these signals relate to other signal designators before them, along (what appears to be) the same trace? They should be the pin designators for the test port... The signal names are within the 'connector' (i.e. A0-A15 are address lines 0 through 15), the names just outside the 'connector' box are the pin identifiers. They start with 1 and go to %X (%X= number of 'fingers' on that side of the connector), and the other side of the same connector is labeled with A through %Y (with %Y defined as %X...). so for example the CPU card has pins 1 through 28 on the component side, and A through FF on the 'solder' side (I,O, and a couple others of the alphabet arnt used to avoid confusion with numerals, and once you go A-Z it continues on AA, BB, CC, etc). sloopy. Ah, that clears a number of things up. While this scan is much more readable than the old Hardware Manual & Magnifying Glass Method, it is still kinda hard to figure out what each Pin Identifier is... I'll take a stab at it, and perhaps someone with a better knowledge of the board can correct it for me: TEST POINTS EXSEL <- ? <- ? <- ? <- F <- 23? <- ?? <- 4 <- W <- V <- 21 <- 13 <- T <- ? <- X <- 17 <- U <- 18 <- 12 <- 3 <- P? <- 1? I? <- AA? <- 27 <- EE <- M? <- S? 3? <- 7 <- 6? 4? <- 25? <- FF? <- 28? 25? <- J <- K <- D? B? 8? <- F? <- I? <- 23? <- 24 TO PAGE ? 2? Quote Link to comment Share on other sites More sharing options...
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