matthew180 Posted May 21, 2013 Share Posted May 21, 2013 Cool. Nice to see you are producing code! Post #34 in the Assembly thread (http://atariage.com/forums/topic/162941-assembly-on-the-994a/page__st__25#entry2019059) might be useful to you now and make a little more sense. Also, once you start to get more comfortable with what is going on, you can add some code to make your scrolling smoother by waiting for the vsync before updating the screen. Good work. Keep plugging away and asking questions. Quote Link to comment Share on other sites More sharing options...
Willsy Posted May 21, 2013 Share Posted May 21, 2013 Nice. As a little test for yourself, try re-writing the VMBW code with a routine that doesn't need a BLWP (so just needs a BL to call it, and an RT to return from it). You should notice it's a lot faster. The TI VMBW routine is quite slow (and it's not all due to the overhead of BLWP/RTWP - though those are quite 'heavy' instructions). :-) Quote Link to comment Share on other sites More sharing options...
Opry99er Posted May 21, 2013 Author Share Posted May 21, 2013 (edited) @Matthew: Thanks man... It's nice to have a success or two. =) @Willsy: Will do. Matthew has some pre-made routines for this kind of thing (which work very well) but for practice, I think I will try to make one without looking at his. =) Quick question guys... Near the top of my source there, I have something like this (I'm at work so I don't have the source in front of me) LI R0,>071F BLWP @VWTR This is attempting to write to VDP register 7 a white background with black foreground... (MSB=register, left nybble of LSB=foreground, right nybble of LSB=background) It does not appear that it is working. What am I doing wrong? =) Edited May 21, 2013 by Opry99er Quote Link to comment Share on other sites More sharing options...
matthew180 Posted May 21, 2013 Share Posted May 21, 2013 (edited) Time to start looking at the 9918A datasheet (see pages 15 and 16). :-) VR7 (VR == VDP Register, so not to confuse them with the CPU registers) contains, in the upper 4-bits, the foreground color for text in the 40-column mode. The low 4-bits contain the color code for the '0' pixels in text mode, and the backdrop color in all other modes. Unless you are in text mode, the high 4-bits are not used. In your example, you are setting the backdrop to white, which also affects the border. Think of this the same as the SCREEN command in XB. However, you are then filling the screen with space characters, which probably don't have their background color set to transparent for that group of colors. Remember, only tile pixels with their color set to transparent will show the background color as set in VR7. The effects you are seeing are the same as this: 10 CALL SCREEN(15) 20 CALL CLEAR 30 PRINT "WHITE BACKDROP" 40 PRINT "BLACK ON GREEN TEXT" 50 CALL COLOR(1,15,3) 60 CALL KEY(0,K,S) 70 IF S=0 THEN 60 80 CALL COLOR(1,15,1) 90 PRINT "BLACK ON TRANSPARENT TEXT" 100 GOTO 100 Once the character set 1 has its background color changed to transparent (1 in XB, 0 in assembly), you will see the backdrop color from VR7 for all the '0' pixels in that set. Edited May 21, 2013 by matthew180 Quote Link to comment Share on other sites More sharing options...
sometimes99er Posted May 21, 2013 Share Posted May 21, 2013 The foreground color in VDP register 7 is only relevant with text mode (40 column). You're in ordinary graphic mode (1) and have 32 color registers (16 in TI Basic and 14 in XB). Quote Link to comment Share on other sites More sharing options...
Opry99er Posted May 21, 2013 Author Share Posted May 21, 2013 Slap forehead.... =) Quote Link to comment Share on other sites More sharing options...
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