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Question on ROM mapping...


cbmeeks

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Been a while since I've posted. :-)

 

Let's say I have a Z80/TMS9918 homebrew computer with a full 64K of SRAM.

 

I would like to take my ROM burner and rip any one of my many CV games. Then, I would like to copy that ROM into the SRAM of my homebrew computer.

 

But here is where my knowledge of CV fails. How would I know where in the 64K address space to map a certain game? Do you see any other potential issues of such an approach? I've read that a real CV has only 1 (or maybe 2)K of RAM and it's repeated 8 times or something crazy like that.

 

My homebrew computer is a generic Z80 with an emulated TMS9918 and SN PSG.

 

Thanks for any information!

 

 

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I do not think its possibe just like it is. First the ports have to be the same as on the CV I assume you want to run a CV rom on your homebrew computer?

 

There are a lot of things to think about:

1) Ports of the VDP are $BE and $BF at the CV would it need to be changed for your homebrew computer ?

2) Port of the SN sound is at $FF (maybe it will respond to $F0) too.

3) CV Joysticks using port $80 and $C0

 

how does you computer handle interrupt is it INT or NMI. (This is also the pain about porting from MSX, Spectravideo, Memotech, SG-1000, SORD M5 to the ColecoVision).

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Yes, I want to run legacy and new ROMS (games) on my home brew.

 

Concerning the ports, I can remap all I/O ports with ease as they are defined in software.

 

The TMS emulator I am writing (using a microcontroller) can switch pins during the vblank period so I could use either INT or NMI.

 

I plan on loading the Coleco BIOS at power on at address $0000. After that, I hoped to load an actual game ROM at address $XXXX. So, you're saying a 32k game should be inserted at $8000? So I assume that a 16k game would start at $C000? Is that what the cartridge pins EN80, ENC0, etc mean? The starting address the game ROM is mapped to?

 

Thanks

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Normal Ram starts at 7000h, but is mirrored back to 4000h and is 800h long.

What? 800h is 2048 bytes, and I'm pretty sure the ColecoVision has only 1K of RAM. I'm also pretty sure the "real hardware" RAM starts somewhere after 7000h in the main adressing range, with all other RAM slices mirrored back to that "real hardware" slice.

 

Someone correct me if I'm wrong. :)

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Mirroring isn't "mirrored back" or "mirrored forward", it's just mirrored. The decoded address range for the ColecoVision's 1k of RAM is $7xxx, so it answers at $7000, $7400, $7800 and $7C00, but none of those is the "real" address. The pins needed to differentiate between those values simply aren't hooked up.

 

Your address bus is 16-bits, so it's basically like so:

 

(msb) NNNN xxRR RRRR RRRR (lsb)

 

Where 'N' is a decoded bit, 'x' is not decoded so is "don't care", and 'R' is a bit that goes to the RAM address lines.

 

Disclaimer: based on memory and the above notes, I didn't double-check the schematic. But this is what it means when a memory or port is 'mirrored', there are simply bits that are not used in the address decode.

 

I hadn't heard it was also at $4000, I can't explain that. Is that true? $6000 would make sense, that would mean only the top 3 bits are decoded.

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That makes more sense.

 

However, if the full 16bit address bus is available, would this stop legacy CV games from working?

 

I mean, if I match the ports, the correct interrupt pin and offer a full 64k address, what am I missing? I just need to map the I/O ports to the TMS and SN PSG right?

 

Please excuse my ignorance.

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Games may read/write to the mirrored address but also use the normal address and they would expect the same data i.e. the mirroring needs to be implemented for full library compatibility.

And yep as Pixelboy said 400h not 800h, my bad :)

There are not that many games that do this, but there is not a lot of information about which ones do so it's best to do it to make sure.

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I guess I don't understand the nature of this mirrored address deal. What's the purpose of it?

The ColecoVision's architecture allowed for 8K of RAM, but RAM was expensive back then and Coleco decided to go with a 1K RAM chip. They didn't want to (or technically could not) completely disable the other unused 7K so the came up with the mirroring thing.

 

 

So, are you saying that a game could write $55 to $7000 (or whatever) and then later, read $7400 and expect that same $55?

Yep. :)

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I guess I don't understand the nature of this mirrored address deal. What's the purpose of it?

 

So, are you saying that a game could write $55 to $7000 (or whatever) and then later, read $7400 and expect that same $55?

 

Yes. The usual reason for it is that it saves logic (although Pixelboy's reasoning happens extremely often too!). Every bit you want to match against is another circuit that needs to be in the system.

 

A lot of systems used a common chip called a 1-of-8 decoder (and I thought Coleco did too... I'll check after work). This chip takes in 3 address lines, treats them as a binary number, and selects one of 8 output lines (representing values 0-7). If you have a 64k address space, and you put the top three bits into one of these chips, then in a single common chip you now have decoded 8 separate address spaces, starting at $0000, $2000, $4000, $6000, $8000, $A000, $C000 and $E000.

 

To use my representation above, we've mapped NNNx xxxx xxxx xxxx from the address bus.

 

If you don't care to decode any further, you can then attach a 1k RAM chip directly to your system. The chip enable comes from the 1-of-8 decoder using (for example) the $6000-based output. The 1k RAM has got 10 address lines, and so you directly hook them up to the ten least significant bits. Then you get, similar to above: NNNx xxRR RRRR RRRR.

 

Three bits are still unused, but since you don't care about the "wasted" space, you're done - this will work perfectly. The only side effect is because three bits of address are unused, this RAM will appear to be mirrored, and will respond at $6000, $6400, $6800, $6C00, $7000, $7400, $7800, and $7C00. It's the same physical chip and literally nothing knows that it's "mirrored", it's just a side effect of what's called an "incomplete decode". A complete decode would take into account all the address lines -- but it was really rare that this was done just because it increased the chip count. (EDIT: the introduction of MMUs (Memory Management Units) mostly put an end to this - since they controlled what the address space pointed to, they did tend to manage all the address lines).

 

The TI99 used this exact scheme, and then inside one block only (the $8000 block), it put in another 1-of-8 decoder and split that one 8k block into 8 smaller blocks in order to route it to RAM and I/O devices. But each smaller block was still 1k in size, and so each device was still mirrored inside that area.

 

For compatibility - I've seen posts here elsewhere that do mention that some titles expect the mirroring to work. It's usually a bug when that happens, but it can be deliberate if the programmer misunderstood the system or wanted to prevent running on clones. I know in some of the Adam threads they've mentioned titles that had trouble with the Adam or the SGM, I think it was, because of the extra RAM. But I was under the impression (untested) that most titles worked. it'd be pretty straightforward to add code to an emulator to detect if a title was reading and writing to different ranges, I suppose... but I'd say just go for it and see what you get. ;)

Edited by Tursi
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Just to round it out, I checked the schematic, and the Coleco does use the exact system I described, with a 74LS138 on the top three address bits. The RAM should echo between $6000 and $7FFF, there are four select lines routed to the cartridge port (one each for $8000, $A000, $C000 and $E000), the ROM responds from $0000-$1FFF (and uses all 8k), and two select lines (one for $2000 and one for $4000) are routed to the expansion port.

 

For what it's worth, the I/O ports are similarly decoded, also with a 1-of-8 decoder, but it's wired a bit differently. It only responds when A7 is high (so ports $80 and up) and only maps A5 and A6 into the address pins, along with write. This allows reads and writes to optionally select different devices, and gives an address map (8-bits wide) of 1NNx xxxx, so each device has 5 bits available to it (or 32 bytes). Write $80-$9F runs controller enable 2 (keypad, with no further decode, so 100x xxxx), Read $80-$9f is not hooked up, Write $a0-$bf writes to VDP (with A0 setting the mode, so 101x xxxM), Read $a0-$bf reads VDP with the same decode, Write $C0-$DF is controller enable 1 (joystick, 110x xxxx), Read $C0-$DF is not hooked up, write $E0-$FF is audio write with no further decode (so 111x xxxx), and read $E0-$FF is controller read with A1 used to select with controller to read (111x xxCx). There's also logic in there to ensure that both the keypad and the joystick aren't driven at the same time.

Edited by Tursi
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if your setup have 64k of ram, its should not be a problem, cause the game can write to e.g $7000. It more the way like the adam do, which in cv mode dont have mirrored ram.

 

In my games I use this way to check if its a adam (or if SGM ram is enabled)

 

write value 0 to $7400

write value 1 to $7000

read value from $7400, if value at $7400 is 1 means the ram is mirrored and is a cv with no sgm enabled, if its a cv with sgm or adam the value should be 0

 

There are some game which are not adam compatible, but now i think they all have been patched, but some games write there values to $6000 but read them from $7000

 

When I do CV stuff, I always keep memory at $6000-$63FF

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