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The Compact Computer 40 (CC40)


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#276 acadiel OFFLINE  

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Posted Tue Dec 5, 2017 7:35 PM

Atrax reminded me of the 64K cartridge with EA and Memo Processor in it.  I don't remember how I dumped it, but pictures of it are here:

 

http://hexbus.com/TI...uter_40.html#25

http://hexbus.com/TI...uter_40.html#26

 

I think there was a bank switch or something that I did before I dumped each 32K memory space.

 

cc40_ea_bank_0-5000-cfff

cc40_ea_bank_1-5000-cfff

 

The only thing I can guess is that when Mechatronics built this cart, they did something with the paging bit (we'd have to check with JGardner on VCFed) and that RUN MP switches it to the 32K of the cart with Memo Processor and RUN ALDS switches it to the 32K of the cart with Editor Assembler.

 

I *think* how I dumped it is that I switched each 32K to the appropriate side by running the command for MP or EA and then exited back to BASIC and did a PEEK.  It stayed in the bank of the last run program.

 

Also, maybe check with HAP who wrote the MESS emulation for it, because it's supposed to work as a 64K bank switched cart there.

 

Ksarul is in possession of this cartridge now, and can map where the A15 line went to.



#277 acadiel OFFLINE  

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Posted Tue Dec 5, 2017 7:55 PM

Hey, is anyone from SNUG reading this thread?  I'd like to see if we might be able to get some of Michael Becker's Hexbus schematics and such over to Jim Brain.   Display adapter, etc.  A lot of that information is unobtainable.  



#278 brain OFFLINE  

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Posted Tue Dec 5, 2017 7:58 PM

Atrax reminded me of the 64K cartridge with EA and Memo Processor in it.  I don't remember how I dumped it, but pictures of it are here:

 

http://hexbus.com/TI...uter_40.html#25

http://hexbus.com/TI...uter_40.html#26

 

I think there was a bank switch or something that I did before I dumped each 32K memory space.

 

cc40_ea_bank_0-5000-cfff

cc40_ea_bank_1-5000-cfff

 

The only thing I can guess is that when Mechatronics built this cart, they did something with the paging bit (we'd have to check with JGardner on VCFed) and that RUN MP switches it to the 32K of the cart with Memo Processor and RUN ALDS switches it to the 32K of the cart with Editor Assembler.

 

I *think* how I dumped it is that I switched each 32K to the appropriate side by running the command for MP or EA and then exited back to BASIC and did a PEEK.  It stayed in the bank of the last run program.

 

Also, maybe check with HAP who wrote the MESS emulation for it, because it's supposed to work as a 64K bank switched cart there.

 

Ksarul is in possession of this cartridge now, and can map where the A15 line went to.

PORT25.2.  I can see the pad connected to something (3rd edge pad from bottom, in top view).

 

I still am not sure if that was TI-sanctioned, or just something this company did.  It'd be nice to know.

 

Jim



#279 acadiel OFFLINE  

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Posted Tue Dec 5, 2017 8:40 PM

PORT25.2.  I can see the pad connected to something (3rd edge pad from bottom, in top view).
 
I still am not sure if that was TI-sanctioned, or just something this company did.  It'd be nice to know.
 
Jim

Hopefully pins 3 and 17, we can figure out how the system toggles them to support paging up to 32K x 4. That would make for some additional fun stuff if we can combine cartridges and the ROM actually scans for them!


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#280 brain OFFLINE  

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Posted Tue Dec 5, 2017 9:26 PM

I am not concerned with paging.  I can support it just fine with the new cart design I have.  The question is who can write code to support these things? :-)

 

Jim



#281 helocast OFFLINE  

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Posted Wed Dec 6, 2017 12:07 AM

Mostly just playing around tonight with the ram cart stuffed with a Dallas DS1250Y (its what I had available from new 99/4A mobo design/project - $7 on eBay's not going to break the bank).

Starting with one of my CC40s that I already added 16KB internally > FRE(0)=18009

Issuing CALL ADDMEM to acquire the 32KB cart > FRE(0)=34414 @ each dipswitch bank setting

Poke and Peek in a short program @ start of cart space and @ end of cart space to see if values were retained. :thumbsup:

 

Thanks again, Jim! :-D

 

Attached Files


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#282 acadiel OFFLINE  

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Posted Wed Dec 6, 2017 4:08 AM

Mostly just playing around tonight with the ram cart stuffed with a Dallas DS1250Y (its what I had available from new 99/4A mobo design/project - $7 on eBay's not going to break the bank).
Starting with one of my CC40s that I already added 16KB internally > FRE(0)=18009
Issuing CALL ADDMEM to acquire the 32KB cart > FRE(0)=34414 @ each dipswitch bank setting
Poke and Peek in a short program @ start of cart space and @ end of cart space to see if values were retained. :thumbsup:
 
Thanks again, Jim! :-D
 


That’s my experience as well with my cart. You only get 16K added, for a 34K system. :)

 

I wonder if it's just using >5000->8FFF at that point and the system ROM just ignores the rest (>9000->CFFF), so you can still poke to it to your heart's content.

 

Also, good call on the DS with the built in battery.  Will try that as well with my prototypes.



#283 acadiel OFFLINE  

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Posted Wed Dec 6, 2017 3:20 PM

6ed0088a907779e3b2885b5dff8d9103.jpg

Impatiently waits for RAM and EEPROMs to come in :-)

#284 sparkdrummer OFFLINE  

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Posted Thu Dec 7, 2017 6:48 AM

Is this latest and greatest CC40 stuff going to be available in a fully assembled form?  I'd love to have one of the carts and the device that allows loading and saving files. I've wanted these things for a long time, that's why I started this thread.



#285 brain OFFLINE  

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Posted Thu Dec 7, 2017 9:14 AM

Is this latest and greatest CC40 stuff going to be available in a fully assembled form?  I'd love to have one of the carts and the device that allows loading and saving files. I've wanted these things for a long time, that's why I started this thread.

The answer will be yes, but what form the products take is still in flux.  The SD drive needs some more work, and a production resizing to be of most benefit, and the RAM/ROM carts need to be tested (I already know there is more functionality that should be added) before we decide on final form.

 

JIm



#286 brain OFFLINE  

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Posted Thu Dec 7, 2017 9:17 AM

If folks missed out on the first board run, I am happy to open a second one for the initial three boards.  Let me know if there is sufficient interest.

 

The new boards will differ:

 

  • unneeded diodes removed from ROM design
  • 6K8 resistor on RAM board rerouted (not sure it is needed, but I'll leave the footprint there)
  • 2 missing lines on the extender were added
  • option to use 27c040 or sst39sf040 ROMs

I may make one more change

 

  • Route 2 "banking" signals to ROM cart (using 2 lowest bank address pins)


#287 sparkdrummer OFFLINE  

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Posted Thu Dec 7, 2017 10:54 AM

brain (Jim) - This is absolutely great, I can see many CC40's being put into use.



#288 ElectricLab OFFLINE  

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Posted Thu Dec 7, 2017 1:29 PM

 

If folks missed out on the first board run, I am happy to open a second one for the initial three boards.  Let me know if there is sufficient interest.

 

The new boards will differ:

 

  • unneeded diodes removed from ROM design
  • 6K8 resistor on RAM board rerouted (not sure it is needed, but I'll leave the footprint there)
  • 2 missing lines on the extender were added
  • option to use 27c040 or sst39sf040 ROMs

I may make one more change

 

  • Route 2 "banking" signals to ROM cart (using 2 lowest bank address pins)

 

 

I'm a little late to the game, but I'd be interested in one. I picked up a CC40 last year and would love to put it to use!



#289 acadiel OFFLINE  

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Posted Thu Dec 7, 2017 3:22 PM

If folks missed out on the first board run, I am happy to open a second one for the initial three boards.  Let me know if there is sufficient interest.
 
The new boards will differ:
 

  • unneeded diodes removed from ROM design
  • 6K8 resistor on RAM board rerouted (not sure it is needed, but I'll leave the footprint there)
  • 2 missing lines on the extender were added
  • option to use 27c040 or sst39sf040 ROMs
I may make one more change
 
  • Route 2 "banking" signals to ROM cart (using 2 lowest bank address pins)
I'll test the new ones too if you like.

Just got RAM chips in and will be testing those carts later on. I also ordered some of the DS backed up chips on eBay to try those out too.

Ksarul, think it's time I help you dump the CC-40+ bios now. :)

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#290 TI998owner OFFLINE  

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Posted Thu Dec 7, 2017 3:35 PM

Hi Jim,
,
The new Rom/ Ram board looks very interesting.
Also I would be interested in the second board
Order. I will PM you later on amount I would
Like.
,
Need a little help today, From Jon Guidry of HEXBUS.com
,
I have been working on a Editor /Assembler cart copy board of
the Mechatronics E/a cart on your site.
Until the files are available for Jim ROM board.
,
Need to know the correct pin connections for PIN # 20
and connections for PIN # 22, where they connect to
The Cart edge connector and signal name for both.
Also if you could check the resistor value. To see
If 3K3 is correct value. Could not tell from picture.
,
Thanks Jim and Jon if you are reading this
Lee TI998owner

#291 brain OFFLINE  

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Posted Thu Dec 7, 2017 6:17 PM

Hmm, Jon is acadiel, is he not?

 

  • Pin 20 is Vplug (or Vswitched, on some schematics)
  • Pin 22 is A6
  • 3K3 would be typical on both other carts.

 

Jim



#292 brain OFFLINE  

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Posted Thu Dec 7, 2017 6:19 PM

 

I'm a little late to the game, but I'd be interested in one. I picked up a CC40 last year and would love to put it to use!

I turned the order form back on, so folks can pre-order.

 

http://store.go4retr...ototype-boards/

 

Jim



#293 TI998owner OFFLINE  

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Posted Thu Dec 7, 2017 6:29 PM

Hi Jim,
The pin 22 is listed as GVPP on the 27C512
The pin 20 is listed as E ( with line over e) on the 27C512
,
The problem is the picture of the Mechatronics E/A cart
Is not clear enough to trace each of these pin,s.
Hopeful Jon could check the cart.
,
Yes , Jon is Acadiel
Thanks
Lee TI998owner

#294 brain OFFLINE  

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Posted Thu Dec 7, 2017 6:45 PM

I routed 25.2 and 25.3 to A15 and A16, configurable with a jumper

I also added support for 28 pin EPROMs

 

 

Attached Files



#295 brain OFFLINE  

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Posted Thu Dec 7, 2017 7:33 PM

Hi Jim,
The pin 22 is listed as GVPP on the 27C512
The pin 20 is listed as E ( with line over e) on the 27C512
,
The problem is the picture of the Mechatronics E/A cart
Is not clear enough to trace each of these pin,s.
Hopeful Jon could check the cart.
,
Yes , Jon is Acadiel
Thanks
Lee TI998owner

Ah, you wanted to know the pins on the EPROM.  Here they are:

 

Pin 20 is !OE (and is connected to the !CS lines

Pin 22 is !CS, and is connected to GND

 

The layout is the same as mine, with the following changes

 

P25.2 (Cc40 pin 17 is connected to A15)

Pin 28 is connected to Vcc.

 

If you install the 28 pin EPROM at the pins 3-30 of the 32 pin socket and wire pin 3 (of 32) to P25.2 (cc40 pin 17) and pin 30 (of 32) to pin 32 (of 32), you have it.

 

Jim

Attached Files


Edited by brain, Thu Dec 7, 2017 7:39 PM.


#296 TI998owner OFFLINE  

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Posted Thu Dec 7, 2017 7:55 PM

Hi Jim,
I will make the changes and test the EPROM
again Bob, sent me
Thank you for the help
Lee TI998owner

#297 acadiel OFFLINE  

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Posted Fri Dec 8, 2017 6:41 PM

I got my SRAMs and EPROMs in today, so will be testing the EPROM image this weekend.



#298 acadiel OFFLINE  

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Posted Sat Dec 9, 2017 8:23 AM

I turned the order form back on, so folks can pre-order.

 

http://store.go4retr...ototype-boards/

 

Jim

Are these the rev 2 ones?



#299 acadiel OFFLINE  

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Posted Sat Dec 9, 2017 9:05 AM

Making good progress.

RAM:

40ea6422bc061d9ae4b3103ac5895165.jpg

Memo Processor PoC:

b5883c0fedced1f06ba4284f38363219.jpg

#300 acadiel OFFLINE  

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Posted Sat Dec 9, 2017 10:42 AM

For posterity, the reason dumped cart images differ depending on method is due to the weird way TI put the ROMs in the memory map.
 
Obviously, dumping a ROM via programmer/reader will yield the correct ROM image.
 
If you dump from BASIC or assembly, look at the memory map for guidance.
 
The 32kB external space starts at >5000.  For purposes of this discussion, you can ignore the bottom 3 hex digits, so we're starting at "page" 5 in memory, or 0101 in binary
 
0101 :memory page 5, and we consider this page 0 of the image
0110 :6/1
0111 :7/2
1000 :8/3
1001 :9/4
1010 :A/5
1011 :B/6
1100 :C/7
 
Now, understand that the top address bit (bit a15) is not connected to the ROM.  Thus, on the above addresses, skip the first digit:
 
101 :5/0
110 :6/1
111 :7/2
000 :page 8 in cc40 memory map and page 3 in our image memory map , but to the EPROM, it looks like page 0
001 :1/4
010 :2/5
011 :3/6
100 :4/7
 
Thus ROM image address >0000 will sit at position >3000 in the MEMORY map relative to that start of the image, which is >5000, or >8000 in the cc40 memory map
 
Thus, to convert an image read by a program to one read by a ROM reader, you have to do the following calculation:
 
ROM dump address = MEMORY dump address - 0x3000 mod 0x8000 or
ROM dump address = MEMORY dump address + 0x5000 mod 0x8000 or
 
MEMORY dump address = ROM dump address + 0x3000 mod 0x8000
 
Since 0x3000 = 3 * 4096, or 12K, that's the 12K offset Acadiel noticed in his memory dump data.
 
Not sure if TI used this as a weak copy protection scheme (can't think of any better reason to do this at present), or something else, but it just makes things ever so slightly more weird in the memory map.


A visual aid (as I cut the 12K off the top of my memory dumps and paste them at the end so they work):

ff0897fafc8483f78cb61168e5ca4250.jpg




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