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D1xx on both XL and XE computers


Dropcheck

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Okay, I'm on board with RD5 being on one of the reserved pins.

 

Something that is an option, but maybe distasteful. We can re-purpose two additional pins on the 800XL PBI. We are in agreement that CAS and RAS signals would not be used on new devices. Those two signal traces could be cut and that would give us two more pins.

 

Like I said it would be distasteful, but possible.

 

What are you proposing to put in place of RAS and CAS if they are removed? Seems like we've covered the bases very well by including HALT, RD5, and $D1xx. Unless there is something just begging to be added, I would say that we are done. Although RAS and CAS don't have much use in the modern world, they were a part of the legacy hardware and it would be shame to get rid of them just in case there is something that they would still be useful for. As to what that is I don't know, but perhaps someone else who does can chime in.

 

Me trying to think of something else :ponder: ...

 

- Michael

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Well,

 

I don't know. How about adding the RD5, S4/S5 or CCTL signals? :-D

 

No really..... I'm just saying since we are talking about a new standard for new devices, if none of those new devices will use these obsolete signals why hang onto them. The only device I know about that was memory related was the 1064XL for the 600XL. :)

 

The problem of course is that a actual cut in the traces is somewhat permanent. Not like a jumper that can easily be unsoldered or simply broken off. :(

 

It's not a have to case. But it would restore two empty pins to the bus. Possibly allowing other devices to be able to live off the bus/1090XLR instead of internal to the computer. :)

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We got RD5 already covered without needing two more pins (maybe you meant to say RD4 -- Right Cart Present, which in a XL or XL tells us that the cart will use an additional 8K of space). S4 and S5 which are the cart chip selects also not likely to be needed on the PBI, well assuming you aren't planning on having a cart slot in the 1090XLR ;) Now CCTL which is actually $D5xx, is a bit more interesting, since it comes into play with bank switching carts, but once again I'm not sure how helpful that would be if you aren't running a cart off the PBI. I really don't think that either of these signals (RD4 or CCTL) is crying out to be included on the PBI spec, and the only reason they even exist on the XE version is that they hitched a ride with the cart slot. It's good to remember that the XE took the cheap way out to create the alternative to the XL PBI, and that meant hijacking the cartridge and slapping on a small ECI connector to pick up the slack. Just because a signal exists on the cart doesn't necessarily mean it was needed for the parallel bus interface.

 

So I think the real question that comes to mind... if we take the XL PBI spec and add the 5 VDC (as was done in a 600XL), and the HALT, RD5, $D1xx signals to it, does this satisfy all likely contingencies for a parallel bus? And if not, what is truly missing? And this shouldn't be limited to what presently exists on the XE version.

 

- Michael

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Hello guys (m/f)

 

RD5 only selects 8kB. Of using 16kB carts you'd need RD4 too.

 

But why would a PBI device want to or even need to use this address range? And why would this part of main memory have to be disabled to switch in something that's inside a PBI device?

 

Sincerely

 

Mathy

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Hello Doc

 

Pin A of the ECI was the reserved pin btw.... never did understand why that was done other than they wanted one spot open just in case something would come up in the future and possibly need that for some unknown chip/etc.... but since that never came about lets finalize it....

 

They needed 15 signals on the ECI. What would make more sense than to add an extra (16th) pin "just in case"?

 

Sincerely

 

Mathy

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RD5 is a winner awesome!

 

not a fan of removing the signals and re-purposing them, just making sure we complete the interface between the two and add in something to the one available reserved pin that would exist after the combination of the two. It finalizes the interface, keeps them compatible and allows to add one signal deemed important to the external pbi bus brigade.... this would make for a success in that only adding jumpers and not cutting a bunch of traces and starting another spider web in all our Atari s. That alone will allow more to be sold and make. I don't have plus+(5) onpin 48 it's just on pin 47 on my 600xl so I must investigate.....

 

rd5

+5

halt

d1xx (still unclear how it adds to selection as outlined under xl pbi)

 

also why not make the two interfaces complete and compatible and just add an extended header for the new interface your outlining it's pennies, it's plug in... it leaves the machines forward and backward compatible.... just tossing it out there... since it is what was basically done for the 1200XL pbi mod

Edited by _The Doctor__
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Hello guys (m/f)

 

RD5 only selects 8kB. Of using 16kB carts you'd need RD4 too.

 

But why would a PBI device want to or even need to use this address range? And why would this part of main memory have to be disabled to switch in something that's inside a PBI device?

 

Sincerely

 

Mathy

 

I don't think the issue is whether the PBI would use this address range, but more to the point that the PBI device might like to know that a cart has been inserted so that it can take certain actions if need be (this entirely depends on what that device is). So using RD5 on the PBI is really more like having a remote switch that simply lets you see that a cart is plugged in, and nothing more. Since there is only one cart slot on any computer having a PBI, and any cart you plugged into that single slot would close the RD5 light switch, RD4 really isn't needed.

 

I hope that answers the question :)

 

- Michael

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I don't have plus+(5) on pin 48 it's just on pin 47 on my 600xl so I must investigate.....

 

I just checked my Chelco 600XL and I have +5 V top (47) and bottom (48). I know there were a couple of different manufactures and some slight differences in the motherboards, perhaps yours only has 5 V to one side of the edge card connection.

 

 

Stock 800XL PBI (600XL has +5 V on 47 and 48)

 

parxl.gif

 

- Michael

Edited by mytekcontrols
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RD5 is a winner awesome!

 

not a fan of removing the signals and re-purposing them, just making sure we complete the interface between the two and add in something to the one available reserved pin that would exist after the combination of the two. It finalizes the interface, keeps them compatible and allows to add one signal deemed important to the external pbi bus brigade.... this would make for a success in that only adding jumpers and not cutting a bunch of traces and starting another spider web in all our Atari s. That alone will allow more to be sold and make. I don't have plus+(5) onpin 48 it's just on pin 47 on my 600xl so I must investigate.....

 

rd5

+5

halt

d1xx (still unclear how it adds to selection as outlined under xl pbi)

 

also why not make the two interfaces complete and compatible and just add an extended header for the new interface your outlining it's pennies, it's plug in... it leaves the machines forward and backward compatible.... just tossing it out there... since it is what was basically done for the 1200XL pbi mod

 

So far nothing we've actually agreed on prevents backward compatibility, if the PBI device followed Atari specs.

 

We are talking about allocating the unused pins on the 800XL/600XL PBI to match some of the signals from the 130XE ECI/Cart. The D1XX signal is present there and provides an already decoded address signal. Bringing the same signal out from the 600XL/800XL U2 pin 14 to PBI pin 37 allows new 'PBI'/1090XLR device developers to eliminate reinventing the address decoding circuitry again and again and again.

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Hello Michael

 

There have to be other ways to detect if a cartridge has been inserted. IIRC that can be done via software. On every XL and XE, without the need to modify the hardware.

 

Sincerely

 

Mathy

 

That may very well be so, but for some reason the creator of the IDE Plus 2.0 Rev E decided to do it by jumpering RD5 over to pin-39 on the XL PBI. From what I understand it isn't absolutely necessary to having the product work, but adds a certain convenience to it. And I don't see it as a sacrifice to give up one of the reserved pins for this usage, since it's looking like we have things pretty well covered anyway.

 

- Michael

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...why not make the two interfaces complete and compatible and just add an extended header for the new interface your outlining it's pennies, it's plug in... it leaves the machines forward and backward compatible.... just tossing it out there... since it is what was basically done for the 1200XL pbi mod

 

That would be much more difficult to do then adding some jumpers. It would be different if we were talking about creating a whole new computer, but we are not in this instance. Only the 1090XLR is going to be a new creation. So imagine if someone were asked to mount another connector in their existing computer to extract these extra signals. That would be a much bigger task than adding a few jumper wires to the standard PBI.

 

- Michael

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We got RD5 already covered without needing two more pins (maybe you meant to say RD4 -- Right Cart Present, which in a XL or XL tells us that the cart will use an additional 8K of space). S4 and S5 which are the cart chip selects also not likely to be needed on the PBI, well assuming you aren't planning on having a cart slot in the 1090XLR ;) Now CCTL which is actually $D5xx, is a bit more interesting, since it comes into play with bank switching carts, but once again I'm not sure how helpful that would be if you aren't running a cart off the PBI. I really don't think that either of these signals (RD4 or CCTL) is crying out to be included on the PBI spec, and the only reason they even exist on the XE version is that they hitched a ride with the cart slot. It's good to remember that the XE took the cheap way out to create the alternative to the XL PBI, and that meant hijacking the cartridge and slapping on a small ECI connector to pick up the slack. Just because a signal exists on the cart doesn't necessarily mean it was needed for the parallel bus interface.

 

So I think the real question that comes to mind... if we take the XL PBI spec and add the 5 VDC (as was done in a 600XL), and the HALT, RD5, $D1xx signals to it, does this satisfy all likely contingencies for a parallel bus? And if not, what is truly missing? And this shouldn't be limited to what presently exists on the XE version.

 

- Michael

 

According to the earlier info on the 1090XL preliminary specs Atari was flirting with something like internal cartridges in the 1090XL. But of course this was on the 600XL/800XL PBI bus with the existing signals, so you maybe right.

 

So

 

PBI pin 47/48 +5V

PBI pin 33 Halt

PBI pin 37 D1XX

PBI pin 39 RD5

 

????

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According to the earlier info on the 1090XL preliminary specs Atari was flirting with something like internal cartridges in the 1090XL. But of course this was on the 600XL/800XL PBI bus with the existing signals, so you maybe right.

 

So

 

PBI pin 47/48 +5V

PBI pin 33 Halt

PBI pin 37 D1XX

PBI pin 39 RD5

 

????

 

That looks good to me :grin:

 

- Michael

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Hello Michael

 

There must be better reasons than this for connecting any signal to a free pin. Otherwise we could just as well bring PB2 and PB3 out.

 

Sincerely

 

Mathy

 

Hi Mathy,

 

Not really sure how to respond to that :ponder: other than I thought we had been in discussions that were pointing in that direction. So once again I'll put the question out there "What is truly needed in a parallel interface?"

 

Obviously the existing XL PBI works as is (it ain't broke). So these 3 extra signals are to enhance it and/or to add what was also available on the ECI (i.e., HALT and $D1xx), or do something that can't simply be decoded from the pre-existing signals (i.e., RD5), or ??? Fill in Blank __________________________

 

- Michael

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Hello Lenore

 

PB2 and PB3 control two LEDs on the 1200XL.

 

But PB4 and PB5 might be better, they control whether ANTIC or the CPU can access extended memory.

 

Sincerely

 

Mathy

 

PS this was NOT meant seriously. I don't want PB2 and PB3 on the PBI and I don't think PB4 and PB5 are really needed on the PBI. Just like we don't need RD4 and/or RD5 on the PBI. Or $D1xx. Let's just add +5VDC and HALT and leave it at that. At the moment, it looks like filling in the free pins is a goal in and by itself. It shouldn't.

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ras and cas are used so that should stay

1064 ties the pins together so thats perfect and 47 48 are set in stone

 

PBI pin 47/48 +5V

PBI pin 33 Halt

PBI pin 37 D1XX

PBI pin 39 RD5

 

after hashing about on this for endless hours and re- examining it I think the proposal is sound for all pins are used in existing devices on one machine or another. It is the combination that get proposed over and over again. Probably for good reason.

 

so what XL pbi pin should be on the eci? since the XL PBI seems settled?

Edited by _The Doctor__
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Speaking for myself only (and I could be completely wrong --- as usual). I think one of the reasons for assigning these pins to something of use before Dropcheck's 1090XLR materializes, is that it will likely have some sort of active line buffering, with probably most of it being unidirectional (except for the data lines). So it would be very important to establish the direction (either input or output) of those signals before the 1090XLR is completed. And like most people (myself included), she likely has a milestone or two that she would like to meet by a certain schedule. I also have an upcoming project that I would like to see implement an enhanced PBI, and I too have a schedule in mind to get there. And to be quite frank, I have seen soooo many projects get left in the dust on AA, mainly because no one can agree on anything. And yes I'll concede some team efforts have yielded great products as well. Anyway let's see if we can agree on something well before next year ;)

 

- Michael

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