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Member Since 4 Mar 2003
OFFLINE Last Active Apr 9 2019 4:23 AM

Topics I've Started

gcc for 6502 (kinda)

Mon Mar 4, 2019 1:43 AM


just an idea I am going "pregnant" for some time. And now a small prove of concept works.


Here the basic idea: GCC is very good in optimizing, but only supports 16 and 32 bit CPUs. So first I thought to port it to Sweet16. But then (while discussing with someone who develops an audio book for developing countries) I got a better idea: Cortex-M0.


The Cortex-M0 has an very limited ISA but is very well supported by gcc (and other commercial compilers).


So, I tried to compile C to assembly, then throw away unneeded stuff and do some modification to get a version which can be fed to lyxass.


In a first step, I just replace the CM0 opcodes 1:1 by 65SC02 ones, like this:


 movs rn,rm


    macro movs
    lda regs_lo+\1
    sta regs_lo+\0
    lda regs_hi+\1
    sta regs_hi+\0

Of course, it will result in a code-explosion, so the next step would be to write an interpreter and generate opcodes for this with the macros.

Kind of Sweet16-reloaded.



Possible bug in handy/handybug (0.95)

Wed Nov 28, 2018 11:13 AM

There seems to be a bug related Z bit evaluation.


I have this code

    lda y2
    sbc y1
    sta MATHE_B
    stz MATHE_B+1
    beq .1

If the sbc results in zero the branch is not taken.

If I move the "stz MATHE_B+1", the branch is taken.

New 6502 (and successors) disassembler

Tue Oct 2, 2018 12:47 AM



just want to share this:




GPU with mutiple interrupts

Sat Jul 7, 2018 9:40 AM



I am facing a strange bug: I have OP interrupt and timer interrupt (1ms period) active.

From time to time, it seems R31 (stackpointer) is not decremented in the timer interrupt which results in a stack underflow.

The OP interrupt never shows this.


Did anyone see a similar problem? I could not find a hint in the bug list.