tregare

I've had to fix several disk controllers on different machines because there is no signal buffering between the controller and the connector and some of those chips are fragile when you suddenly ground out the signal lines and dump 5V TTL signals on ground lines.

Ok, I finally have the parts for the kit versions, and I have assembled and tested versions. Prices are as follows: Bare board with jumper wire and parts list: $7.50 Kit with all parts: $17.50 Completed SRAMCharger: $27.50 Plus shipping. USPS priority mail flat rate in USA,with insurance and delivery conf. $ 7.40 USPS Priority Mail flat rate intnl, W/ Cert of mailing and customs frm: $ 16.50 If you are interested, please PM me and we can make arrangements.

shouldn't be too hard to fix, odds are you fried the controller chip on the board. de-solder it if it is soldered in and replace the chip.

if your indus is out of alignment, it will read its own disks and its disks won't be readable in other drives, same with the 1050. if you hook the 1050 up as drive 2, can you format a dos disk in it? then switch to drive one and boot from it?

I've seen some ads in craigslist for places in OLY and everett.

what is the one book that is in the 96 books that isn't in the 95 torrent?

My MacPro should be seeding also. I'm pretty sure I restarted the DL after booting back into MacOS... I am SO looking forward to Left4Dead/Left4Dead2 and the HL2 games being ready for Mac. that's the main reason I boot to windows is to play the games that aren't there for MacOSX

Oh, the BSI chips, I also had my "fun" with them while building my 512k SRAM upgrade... I'm not sure what exactly is going wrong with them, but I managed to get them working correctly using these equations: /OE = RW * PHI2 /WE = /RW * PHI0 * PHI2 /CE = [address lines] * (PHI0 + PHI2) The "PHI0 * PHI2" term in the WE signal is just to work around timing problems with some Ataris by shortening the WE cycle. But the CE timing seems to be crucial to get the BSI chips working properly. For all other RAM and flash chips I just used a combinatorial term without PHIx (depending only on the address lines) for CE and it worked fine. But with the BSI chips that resulted in occasional errors when the RAM upgrade was configured to modes without separate ANTIC access. So the next try looked like this: /CE = [address lines] * PHI2 This worked fine so far, but a few months ago a friend told me that he had problems with the current BSI chips in his 130XE. Replacing PHI2 with (PHI0 + PHI2) in the CE term cured these problems. So it seems the chip has problems when /CE is not asserted before /OE or /WE... mega-hz reported another interesting thing: he also had severe problems with the BSI chips but they disappeared once he added a diode to the VCC line to the BSI chip (to support battery backup of the RAM). This leads to VCC of the BSI chip being at ~4.3-4.5V. So: it's all very strange and I never had any of these problems with any other manufacturer... so long, Hias thank you, I was starting to worry it was just me I have a bunch of Hitachi 80ns 628128 srams on their way to me they just work looking at the datasheet i was able to find didn't give me any clues as to why it was doing what it was doing...

Error 1 means that there is no extended RAM at $8000. Check if A15 enables it. You probably saw a file "indus14.bin" which in fact is the older 1.10 ROM. The 1.20 file is "indus12.bin". Thanks Trub it turns out that the low power 628128 chips I had from another project will not work in the indus SRAMcharger. I swapped it with a standard Hitachi 628128 non LP device and it works like a champ and passes the ram test. now to just complete the last 2 I am assembling for now and I can write up the part list and errata (1 jumper wire) and start the process of making these available in kit form, bare board with parts list and complete sramcharger and I have assembled and tested 2 with the horizontally attached connector like you need for the indus style drives that weren't made by indus By the way, the chips I foudn that didn't want to work are BSI BS62LV1027PCP70. the chips power down when de-selected and I am suspecting they are not finishing up the power back up cycle before it attempts to access it

B&C has PAL 130XE's with defective PAL GTIAs, can these be easily converted to NTSC?

What exactly is that and how would I fix it? Thanks, Roger U19 and U23 are 2 74LS244 chips on the main-board, they might be soldered in. a 74LS244 is an octal buffer/line driver, it is for buffering signals usually. the 2 that Trub mention are for: (U19) buffering the Atari port signals and IRQ/DRQ signals internally (to the data bus). if that chip has failed you can get the H3 (Halt in test 3) error code (U23) sits between the 4 config switches on the back and the data-bus and the front panel switches and the data bus. by sits between I mean electrically. have you taken a meter and checked the voltages at the powersupply conection? if it is too far out of spec it can cause odd behavior. if it is the disk controller, I forget exactly which one the indus uses, but if that is bad, it's a chip swap to repair the problem. I've fixed several 1050's that way, swapping the FDC chip and RIOT. also, what part of the country or world are you located in, there may be someone near by that can swap parts / fix it for you.

costs will roughly be: completed board will be under $30. bare board with part-list and errata will be around $7.50-10 kit, somewhere in-between, most likely under $20 (depends on how much i end up paying for the 2 most expensive parts, the SRAM and the connector to Indus main-board) and shipping naturally. completed boards have been run through a couple of memory tests and as soon as I can get the disks made will be booted to CP/M I am planning on including a boot disk with the card including Trub's CPMtool program. although I really recommend downloading it from his site and running it on your Indus to see what ROM version you have. I should be receiving some 27c32's shortly so if needed I can burn a 1.2 replacement ROM to ship with the board/kit/complete unit if needed. part of the cost on the kits and complete board are partly due to the sockets, as I have put turned-pin IC sockets on the ones I have already assembled for ease of repair should one get fried, the only active components that need desoldered to replace are the monolithic no polarized decoupling capacitors on the board I personally prefer the turned-pin sockets as they are more rugged and in my experience less prone to failure than the cheaper dual-wipe sockets. I will be posting in the marketplace once I have preparations complete, I am hoping to be able to provide completed units and PCB's by Monday 5/17 and as soon as the 2 batch of chips, sockets, connectors and capacitors arrive I can do the kits. and for a little extra, I can print out the reconstituted Indus GT field service manual and include that too (haven't decided how much, probably $10 or less) although I have made the PDF available for free on my server

grab the service manual from http://www.reedcc.com/INDUS_GT_FSManual.pdf here is the section on a H3 error 3.4.5 (C3/H3) Floppy Disk Controller Test * The floppy disk controller (FDC) is the heart of the disk drive. This test runs through a complex series of routines to checkout the FDC. The test proceeds as follows: 1. The UART issues a FORCE IMMEDIATE INTERRUFT command to the FDC. 2. The Z80A goes into a short time delay loop for 52 microseconds. This is the maximum time the WD1770 should require to respond. The WD2797 is a lot faster. 3. The FDCs INTRQ line is tested to see if the FDC has interrupted. Note that the FDCs INTRQ line is not tied to the Z80As IRQ line. The test fails if the FDC has not responded. 4. The FDC is issued a FORCE INTERRUPT command to clear the FORCE IMMEDIATE INTERRUPT condition. 5. The Z80A once again waits for 52 microseconds to allow plenty of time for the FDC to respond. 6. The FDC status register is read to clear the FDC interrupt condition. 7. The Z80A waits for another 52 microseconds to allow time for the FDC to respond. 8. The FDC INTRO line is again tested to make sure the FDC has cleared it. The test fails if the FDC has not responded. 9. The FDC track, sector, and data registers (in that order) are loaded with 00H, 01H, and 02H respectively. Then the data, sector, and track registers (in that order) are tested to see if the pattern has changed. The test fails if there is a mismatch. If all three patterns match, the test is repeated with 01H, 02H, and 03H respectively. This testing continues until the last pattern used is FFH, 00H, and 01H respectively. 10. The FDC track register is copied to the data register and a seek command is issued. This causes the FDC to seek to the track it is already on. This test verifies that the WD1770 is in Mode 1 and that the IP is reselected in the status register. This test isn’t required with the WD2797. 11. The FDC index pulse (IP) line is set active. 12. The Z80A delays for slightly more than 20 microseconds to give the FDC time to react. 13. The FDC status register is checked to see if the index was recognized. The test fails if it was not recognized. 14. The FDC index pulse line is deactivated. 15. The Z80A delays for slightly more than 20 microseconds to give the FDC time to react. 16. The FDC status register is checked to see if the removal of the index was recognized. The test fails if it was not recognized. If any of these tests fail, the drive will show H3 in the LED display and ’H’alt.

can you hear the drive spinning when you power it on? it's possible the LED is dead.

PM me

i wouldn't mind a set either if anyone has a set they'd let go of at a reasonable price

Error 1 means that there is no extended RAM at $8000. Check if A15 enables it. You probably saw a file "indus14.bin" which in fact is the older 1.10 ROM. The 1.20 file is "indus12.bin". Thanks Trub it turns out that the low power 628128 chips I had from another project will not work in the indus SRAMcharger. I swapped it with a standard Hitachi 628128 non LP device and it works like a champ and passes the ram test. now to just complete the last 2 I am assembling for now and I can write up the part list and errata (1 jumper wire) and start the process of making these available in kit form, bare board with parts list and complete sramcharger and I have assembled and tested 2 with the horizontally attached connector like you need for the indus style drives that weren't made by indus

Are you using a linear or switching regulator? I would guess linear since it needs the heatsink/cooling fan?

ok, it's good to know the info I found was bogus. cpmtool reports ERROR 1 and crashes. I'm trying to run it under REAL DOS. I wonder what the heck the "1.4" rom I saw for the indus was. I'll have to find it again and check it and see WTF it is.

Ok, 2 steps forward, one sideways. first board is in drive, atari is connected to 19"lcd and drive is hooked to atari. apparently the drive is rev 1.2 rom. and from info i have found from searches I need to have 1.4 in the indus to use the ramcharger and cp/m so now to seek out the 1.4 rom image and burn it to a chip and update

what format is that ATR in? Tried to write it to a disk last night using prosystem and it complained that it was not a valid image size.

got tired of playing with weird cabling in my bedroom to hook the atari 8 bit up so for testing things, I bought a Composite to VGA converter. it sure looks odd to have an atari 8-bit hooked up to a 19 inch widescreen LCD display

Thank you!

Speaking of Indus software. does ANY of the disk imaging software that works with a SIO2PC correctly image the first track on atari format disks? the indus CP/M disk that is downloadable has a corrupt first track because (and this is the explination I was given) the 1050 only reads 128 bytes on the first several sectors of track 0 on a double density disk. I would like to fix the indus CP/M images and make an image that can be re-written to a disk without having to jump through a bunch of hoops.

dang, if you were only up towards washington... that logic analyser looks sweet